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PIC18F4550ESPQTP Datasheet(PDF) 20 Page - Microchip Technology |
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PIC18F4550ESPQTP Datasheet(HTML) 20 Page - Microchip Technology |
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20 / 438 page  PIC18F2455/2550/4455/4550 DS39632E-page 18 © 2009 Microchip Technology Inc. PORTB is a bidirectional I/O port. PORTB can be software programmed for internal weak pull-ups on all inputs. RB0/AN12/INT0/ FLT0/SDI/SDA RB0 AN12 INT0 FLT0 SDI SDA 33 9 8 I/O I I I I I/O TTL Analog ST ST ST ST Digital I/O. Analog input 12. External interrupt 0. Enhanced PWM Fault input (ECCP1 module). SPI data in. I2C™ data I/O. RB1/AN10/INT1/SCK/ SCL RB1 AN10 INT1 SCK SCL 34 10 9 I/O I I I/O I/O TTL Analog ST ST ST Digital I/O. Analog input 10. External interrupt 1. Synchronous serial clock input/output for SPI mode. Synchronous serial clock input/output for I2C mode. RB2/AN8/INT2/VMO RB2 AN8 INT2 VMO 35 11 10 I/O I I O TTL Analog ST — Digital I/O. Analog input 8. External interrupt 2. External USB transceiver VMO output. RB3/AN9/CCP2/VPO RB3 AN9 CCP2(1) VPO 36 12 11 I/O I I/O O TTL Analog ST — Digital I/O. Analog input 9. Capture 2 input/Compare 2 output/PWM2 output. External USB transceiver VPO output. RB4/AN11/KBI0/CSSPP RB4 AN11 KBI0 CSSPP 37 14 14 I/O I I O TTL Analog TTL — Digital I/O. Analog input 11. Interrupt-on-change pin. SPP chip select control output. RB5/KBI1/PGM RB5 KBI1 PGM 38 15 15 I/O I I/O TTL TTL ST Digital I/O. Interrupt-on-change pin. Low-Voltage ICSP™ Programming enable pin. RB6/KBI2/PGC RB6 KBI2 PGC 39 16 16 I/O I I/O TTL TTL ST Digital I/O. Interrupt-on-change pin. In-Circuit Debugger and ICSP programming clock pin. RB7/KBI3/PGD RB7 KBI3 PGD 40 17 17 I/O I I/O TTL TTL ST Digital I/O. Interrupt-on-change pin. In-Circuit Debugger and ICSP programming data pin. TABLE 1-3: PIC18F4455/4550 PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Name Pin Number Pin Type Buffer Type Description PDIP QFN TQFP Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels I = Input O = Output P = Power Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared. 2: Default assignment for CCP2 when CCP2MX Configuration bit is set. 3: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No Connect unless ICPRT is set and the DEBUG Configuration bit is cleared. |
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