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PIC18F4550ESPQTP Datasheet(PDF) 56 Page - Microchip Technology |
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PIC18F4550ESPQTP Datasheet(HTML) 56 Page - Microchip Technology |
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56 / 438 page  PIC18F2455/2550/4455/4550 DS39632E-page 54 © 2009 Microchip Technology Inc. INDF2 2455 2550 4455 4550 N/A N/A N/A POSTINC2 2455 2550 4455 4550 N/A N/A N/A POSTDEC2 2455 2550 4455 4550 N/A N/A N/A PREINC2 2455 2550 4455 4550 N/A N/A N/A PLUSW2 2455 2550 4455 4550 N/A N/A N/A FSR2H 2455 2550 4455 4550 ---- 0000 ---- 0000 ---- uuuu FSR2L 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu STATUS 2455 2550 4455 4550 ---x xxxx ---u uuuu ---u uuuu TMR0H 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu TMR0L 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu T0CON 2455 2550 4455 4550 1111 1111 1111 1111 uuuu uuuu OSCCON 2455 2550 4455 4550 0100 q000 0100 00q0 uuuu uuqu HLVDCON 2455 2550 4455 4550 0-00 0101 0-00 0101 u-uu uuuu WDTCON 2455 2550 4455 4550 ---- ---0 ---- ---0 ---- ---u RCON(4) 2455 2550 4455 4550 0q-1 11q0 0q-q qquu uq-u qquu TMR1H 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu TMR1L 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu T1CON 2455 2550 4455 4550 0000 0000 u0uu uuuu uuuu uuuu TMR2 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu PR2 2455 2550 4455 4550 1111 1111 1111 1111 1111 1111 T2CON 2455 2550 4455 4550 -000 0000 -000 0000 -uuu uuuu SSPBUF 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu SSPADD 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu SSPSTAT 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu SSPCON1 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu SSPCON2 2455 2550 4455 4550 0000 0000 0000 0000 uuuu uuuu ADRESH 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu ADRESL 2455 2550 4455 4550 xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 2455 2550 4455 4550 --00 0000 --00 0000 --uu uuuu ADCON1 2455 2550 4455 4550 --00 0qqq --00 0qqq --uu uuuu ADCON2 2455 2550 4455 4550 0-00 0000 0-00 0000 u-uu uuuu TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED) Register Applicable Devices Power-on Reset, Brown-out Reset MCLR Resets, WDT Reset, RESET Instruction, Stack Resets Wake-up via WDT or Interrupt Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition. Shaded cells indicate conditions do not apply for the designated device. Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack. 2: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (0008h or 0018h). 4: See Table 4-3 for Reset value for specific condition. 5: PORTA<6>, LATA<6> and TRISA<6> are enabled depending on the oscillator mode selected. When not enabled as PORTA pins, they are disabled and read ‘0’. |
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