A43L8316 datasheet(34/45 Pages) AMICC

34 / 45 page

A43L8316

Preliminary (April, 2000, Version 1.0)

AMIC Technology, Inc.

Read Interrupted by Precharge Command & Read Burst Stop Cycle (@Burst Length = Full Page)

* Note : 1. At full page mode, burst is wrap-around at the end of burst. So auto precharge is impossible.

2. About the valid DQ’s after burst stop, it is same as the case of RAS interrupt.

Both cases are illustrated above timing diagram. See the label 1,2 on them.

But at burst write, burst stop and RAS interrupt should be compared carefully.

Refer the timing diagram of “Full page write burst stop cycle”.

3. Burst stop is valid at every burst length.

High

CLOCK

CKE

RAS

CAS

ADDR

Row Active

(A-Bank)

: Don't care

RAa

A8/AP

CAa

RAa

QAa3

QAa2

QAa1

QAa4

QAb0

DQM

QAa4

QAa3

QAa1

QAa2

QAb0 QAb1 QAb2 QAb3

(CL=2)

QAb1 QAb2 QAb3

(CL=3)

Precharge

(A-Bank)

Read

(A-Bank)

CAb

Read

(A-Bank)

Burst Stop

* Note 1

* Note 2

QAa0

QAb4 QAb5

QAa0

QAb4 QAb5

A43L8316 Datasheet(PDF) 34 Page - AMIC Technology

A43L8316 Datasheet(HTML) 34 Page - AMIC Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

Datasheet Download

Link URL