PIC18F4550ESOSQTP datasheet(307/430 Pages) MICROCHIP

307 / 430 page

Preliminary

DS39632D-page 305

PIC18F2455/2550/4455/4550

25.5.2

DATA EEPROM

CODE PROTECTION

The entire data EEPROM is protected from external

reads and writes by two bits: CPD and WRTD. CPD

inhibits external reads and writes of data EEPROM.

WRTD inhibits internal and external writes to data

EEPROM. The CPU can continue to read and write

data EEPROM regardless of the protection bit settings.

25.5.3

CONFIGURATION REGISTER

PROTECTION

The Configuration registers can be write-protected.

The WRTC bit controls protection of the Configuration

registers. In normal execution mode, the WRTC bit is

readable only. WRTC can only be written via ICSP

operation or an external programmer.

25.6

ID Locations

Eight

memory

locations

(200000h-200007h)

are

designated as ID locations, where the user can store

checksum or other code identification numbers. These

locations are both readable and writable during normal

execution through the TBLRD and TBLWT instructions

or during program/verify. The ID locations can be read

when the device is code-protected.

25.7

In-Circuit Serial Programming

PIC18F2455/2550/4455/4550 microcontrollers can be

serially programmed while in the end application circuit.

This is simply done with two lines for clock and data

and three other lines for power, ground and the

programming voltage. This allows customers to manu-

facture boards with unprogrammed devices and then

program the microcontroller just before shipping the

product. This also allows the most recent firmware or a

custom firmware to be programmed.

25.8

In-Circuit Debugger

When the DEBUG Configuration bit is programmed to

a ‘0’, the In-Circuit Debugger functionality is enabled.

This function allows simple debugging functions when

used with MPLAB® IDE. When the microcontroller has

this feature enabled, some resources are not available

for general use. Table 25-4 shows which resources are

required by the background debugger.

TABLE 25-4:

DEBUGGER RESOURCES

To use the In-Circuit Debugger function of the micro-

controller, the design must implement In-Circuit Serial

Programming connections to MCLR/VPP/RE3, VDD,

VSS, RB7 and RB6. This will interface to the In-Circuit

Debugger module available from Microchip or one of

the third party development tool companies.

25.9

Special ICPORT Features

(Designated Packages Only)

Under specific circumstances, the No Connect (NC)

pins of PIC18F4455/4550 devices in 44-pin TQFP

packages can provide additional functionality. These

features are controlled by device Configuration bits and

are available only in this package type and pin count.

25.9.1

DEDICATED ICD/ICSP PORT

The 44-pin TQFP devices can use NC pins to provide

an alternate port for In-Circuit Debugging (ICD) and

In-Circuit Serial Programming (ICSP). These pins are

collectively known as the dedicated ICSP/ICD port,

since they are not shared with any other function of the

device.

When implemented, the dedicated port activates three

NC pins to provide an alternate device Reset, data and

clock ports. None of these ports overlap with standard

I/O pins, making the I/O pins available to the user’s

application.

The dedicated ICSP/ICD port is enabled by setting the

ICPRT Configuration bit. The port functions the same

way as the legacy ICSP/ICD port on RB6/RB7.

Table 25-5 identifies the functionally equivalent pins for

ICSP and ICD purposes.

TABLE 25-5:

EQUIVALENT PINS FOR

LEGACY AND DEDICATED

ICD/ICSP™ PORTS

I/O pins:

RB6, RB7

Stack:

2 levels

Program Memory:

512 bytes

Data Memory:

10 bytes

Pin Name

Type

Pin Function

Legacy

Port

Dedicated

Port

MCLR/VPP/

RE3

NC/ICRST/

ICVPP

Device Reset and

Programming

Enable

RB6/KBI2/

PGC

NC/ICCK/

ICPGC

Serial Clock

RB7/KBI3/

PGD

NC/ICDT/

ICPGD

I/O

Serial Data

Legend:

I = Input, O = Output, P = Power

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