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DSPIC33FJ64GP706 Datasheet(PDF) 309 Page - Microchip Technology |
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DSPIC33FJ64GP706 Datasheet(HTML) 309 Page - Microchip Technology |
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309 / 322 page ![]() © 2009 Microchip Technology Inc. DS70286C-page 307 dsPIC33FJXXXGPX06/X08/X10 APPENDIX A: REVISION HISTORY Revision A (October 2006) Initial release of this document. Revision B (March 2008) This revision includes minor typographical and formatting changes throughout the data sheet text. The major changes are referenced by their respective section in the following table. TABLE A-1: MAJOR SECTION UPDATES Section Name Update Description Section 1.0 “Device Overview” Added External Interrupt pin information (INT0 through INT4) to Table 1-1. Section 3.0 “Memory Organization” Updated Change Notification Register Map table title to reflect application with dsPIC33FJXXXMCX10 devices (Table 3-2). Added Change Notification Register Map tables (Table 3-3 and Table 3-4) for dsPIC33FJXXXMCX08 and dsPIC33FJXXXMCX06 devices, respectively. Updated the bit range for AD1CON3 (ADCS<7:0>) in the ADC1 Register Map and added Note 1 (Table 3-15). Updated the bit range for AD2CON3 (ADCS<7:0>) in the ADC2 Register Map (Table 3-16). Updated the Reset value for C1FEN1 (FFFF) in the ECAN1 Register Map When C1CTRL1.WIN = 0 or 1 (Table 3-18) and updated the title to reflect applicable devices. Updated the title in the ECAN1 Register Map When C1CTRL1.WIN = 0 to reflect applicable devices (Table 3-19). Updated the title in the ECAN1 Register Map When C1CTRL1.WIN = 1 to reflect applicable devices (Table 3-20). Updated the Reset value for C2FEN1 (FFFF) in the ECAN2 Register Map When C2CTRL1.WIN = 0 or 1 (Table 3-21) and updated the title to reflect applicable devices. Updated the title for the ECAN2 Register Map When C2CTRL1.WIN = 0 to reflect applicable devices (Table 3-22). Updated the title for the ECAN2 Register Map When C2CTRL1.WIN = 1 to reflect applicable devices (Table 3-23). Updated Reset value for TRISA (C6FF) and changed the bit 12 and bit 13 values for ODCA to unimplemented in the PORTA Register Map (Table 3-25). Changed the bit 10 and bit 9 values for PMD1 to unimplemented in the PMD Register Map (Table 3-34). Section 5.0 “Reset” Added POR and BOR references in Reset Flag Bit Operation (Table 5-1). Section 7.0 “Direct Memory Access (DMA)” Updated the table cross-reference in Note 2 in the DMAxREQ register (Register 7-2). |
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