AS3658F-BCTP datasheet(116/158 Pages) AMSCO

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AS3658

Data Sheet Confidential - Detail ed Descri ption- Audio Functi ons

9.12

SPDIF output

Enables and controls the SPDIF output pin. SPDIF functionality is enabled, if internal masterclock is used (internal

PLL), or the external masterclock = 256* LRCLK. (No SPDIF function if external masterclock= 128 *LRCLK)

Table 121. SPDIF Register

Addr:89

SPDIF

These bits control the SPDIF output

Bit

Bit Name

Default

Access

Description

1:0

spdif_cntr

00b

R/W

ISPDIF output ON/OFF control and sample rate status

bits

SPDIF output OFF

SPDIF output ON

reserved (do not use)

spdif_invalid

R/W

SPDIF sample status bit

sample valid

sample invalid

spdif_mclk_inv

R/W

SPDIF master clock control bit

master clock

master clock inverted

spdif_copy_ok

R/W

SPDIF copy control bit

copy not permitted

copy permitted

sdo3_select

R/W

Select source of SDO3 output

Select adc_output

Select Equalizer output

sclk_invert

R/W

Invert serial data clock of I2S1 and I2S2

Normal mode

Invert SCLK1 or SCLK2 input

audio_off

R/W

switch off audio functionality for low power

touchpannel detection

Normal mode

audio bias switched off to reduce power

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