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P2020PSE2MZB Datasheet(PDF) 2 Page - Freescale Semiconductor, Inc |
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P2020PSE2MZB Datasheet(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 8 page  freescale.com/QorIQ 3 Telecom Features for the market: • DualGigabitEthernetonSGMII (for redundancy) or Serial RapidIO® interface for implementing backhaul • SerialRapidIOinterfacefordirect connection to digital signal processors (DSPs)—for Layer 1 processing • Securityenginehandlesthesecurenetwork termination requirement • Advancedqualityofservice(QoS)for Gigabit Ethernet to assist in scheduling Layer 2 baseband processing Applications: • AdvancedMC™card • ControlleronAdvancedTCA® carrier card • Channelandcontrolcardfor3GNodeB, 2G/2.5G BTS IP upgrades, WCDMA, 4G LTE and WiMAX • Generalpurposecomputeblade LTE and WiMAX Baseband The P2020 and P2010 communications processors are well-suited for Long-Term Evolution (LTE) and WiMAX channel card applications. There are two factors that drive the need for dual-core performance without breaking out of a single-core power budget: • Increasedbandwidthpersubscriber • Flatteningoftheinfrastructurehierarchy Together, these factors increase the processing requirements of the channel card. P2 series processors, with dual- core performance in single-core power budgets, can increase performance in Layer 2 baseband processing and implementing network interfaces. Layer 2 baseband processing implements the RLC layer that controls the base station and subscriber access to air interface resources. The advanced QoS features of the Gigabit Ethernet ports assist in scheduling these resources. This Layer 2 processing includes the medium access control (MAC), which controls the base station and subscriber access to air interface resources. Resources are scheduled according to QoS requirements using packet concatenation and segmentation, retransmission through automatic repeat request (ARQ) and hybrid automatic repeat request (HARQ) in combination with Layer 1. Typically backhaul is implemented with either dual Gigabit Ethernet on SGMII (for redundancy) or Serial RapidIO interface, both of which are supported in the QorIQ P2 series processors. The Serial Rapid IO interface also allows direct connection to the DSPs—such as Freescale’s MSC8144 and MSC8156 four- and six-core DSPs—that implement the Layer 1 processing. The security block handles the secure network termination requirement. This solution performs network backhaul transport and interworking with internal interfaces. This includes processing the network layers up to OSI Layer 3, including IPsec secure network termination, header compression and traffic classification (QoS).Thenetworkinterfacecard(NIC) can optionally support 3G LTE radio link encryption—however, depending upon the selected architecture, this could be partitioned to the channel card. LTE and WiMAX Baseband QorIQ™ P2 Series Serial RapidIO® Backplane 500 Mbps Gigabit Ethernet control and data, redundant Serial RapidIO Serial RapidIO Serial RapidIO x1/x4 Serial RapidIO x1/x4 (up to 3.125 GHz) Low latency OBSAI/CPRI • Serial RapidIO messaging unit • Multiple mailboxes • Port read/write to configure switch • Messaging (inbound/outbound) local and remote • MAC • Scheduler Switch FPGA xn DSPs DSP DSP DSP |
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