82091AA datasheet(39/204 Pages) INTEL

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82091AA

Bit

Description

PARALLEL PORT FIFO THRESHOLD SELECT (PTHRSEL)

This bit controls the FIFO threshold

and only affects parallel port operations when the parallel port is in ECP mode or ISA-Compatible

FIFO mode When PTHRSELe1 the FIFO threshhold is 1 in the forward direction and 15 in the

reverse direction When PTHRSELe0 the FIFO threshold is 8 in both directions This bit can only

be programmed when the parallel port is in ISA-Compatible or PS2-Compatible mode These

modes can be selected via bits 65 of this register or the ECP Extended Control Register (ECR)

NOTE

In the reverse direction a threshold of 158 means that a request (DMA or Interrupt is

enabled) is generated when 158 bytes are in the FIFO In the forward direction a threshold

of 18 means that a request is generated when 18 byte locations are available

PARALLEL PORT HARDWARE MODE SELECT (PPHMOD)

This field selects the parallel port

hardware mode The ISA-Compatible mode is for compatibility and nibble mode peripheral interface

protocols The PS2-Compatible mode is for the byte mode peripheral interface protocol The EPP

and ECP modes are for the EPP and ECP mode peripheral interface protocols respectively This

field can be configured by strapping options at powerup for hardware extended configuration (HWE)

mode only For all other hardware configuration modes (SWMB SWAI and HWB) the default is 00

(ISA-Compatible)

Bits 65

Read

Write

0 0

ISA-Compatible

ISA-Compatible(1)

0 1

PS2-Compatible

PS2-Compatible(1)

1 0

EPP

EPP(1 3)

1 1

ECP(2)

Reserved do not write(2)

NOTES

1 ISA-Compatible PS2-Compatible and EPP modes are selected via this field or hardware

configuration In addition ISA-Compatible and PS2-Compatible modes can be selected via the

ECP Extended Control Register (ECR) When the ECR is programmed for one of these two

modes (ECR 75 e000 001) this field is updated to match the selected mode

2 ECP Mode can not be entered by programming this field ECP Mode can only be selected through

the ECR When the ECR is programmed for ECP mode the 82091AA sets this field to 11

3 Parallel port interface signals controlled by the PCON Register (SELECTIN

INIT

AUTOFD

and STROBE ) should be negated before entering EPP mode

RESERVED

PARALLEL PORT IRQ SELECT (PIRQSEL)

When PIRQSELe1 IRQ7 is selected as the parallel

port interrupt When PIRQSELe0 IRQ5 is selected as the parallel port interrupt This field can be

configured by strapping options at powerup for HWB and HWE modes only For all other hardware

configuration modes (SWMB and SWAI) the default is 0 (IRQ5)

82091AA Datasheet(PDF) 39 Page - Intel Corporation

82091AA Datasheet(HTML) 39 Page - Intel Corporation

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