8X930AX datasheet(21/38 Pages) INTEL

21 / 38 page

ADVANCE INFORMATION

8x930Ax UNIVERSAL SERIAL BUS (USB) MICROCONTROLLER

AVDV

Address (P2) Valid to Valid

Data/Instruction In

118.66

(2+M+N)T

CLK

– 48

(3, 6)

AVDV

Address (P2) Valid to Valid

Instruction In

23.33

(1+N)T

CLK – 60

ns (6)

AVRL (5)

Address Valid to RD# or PSEN#

Low

40.33

(1+M)T

CLK – 46

ns (3)

AVWL

Address (P0) Valid to WR# Low

40.33

(1+M)T

CLK – 46

ns (3)

AVWL

Address (P2) Valid to WR# Low

66.33

(1+M)T

CLK – 17

ns (3)

WHQX

Data Hold after WR# High

28.66

0.5 T

CLK – 13

QVWH

Data Valid to WR# High

68.33

(1+N)T

CLK –15

ns (6)

WHAX

WR# High to Address Hold

70.33

CLK – 13

Table 11. AC Characteristics at Operating Conditions (Continued)

Symbol

Parameter

CPU Frequency

@ 12 MHz

(M, N = 0)

CPU Frequency (F

CLK) Variable

Units

Min

Max

NOTES:

Refer to Table 8 on page 12 for CPU frequencies vs. XTAL1 frequencies.

XTAL1 frequency is

± 0.25% for full speed and ± 1.5% for low speed.

M= 0,1 is the extended ALE state.

At 50° C, T

LLAX = 8 ns

Specifications for PSEN# are identical to those for RD#.

N= 0,1,2,3 is the RD#/PSEN#/WR# wait state.

8X930AX Datasheet(PDF) 21 Page - Intel Corporation

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