UPD17010GF datasheet(45/424 Pages) NEC

45 / 424 page

µPD17010

5.6.2 Function of index register and data memory row address pointer

The index register and data memory row address pointer modify the addresses of the data memory.

The following paragraphs (1) and (2) describe the functions of the index register and data memory row address

pointer.

A dedicated instruction (“INC IX”) that can increment the contents of the index register by one at a time is provided.

For the details of address modification, refer to 7. ALU (ARITHMETIC LOGIC UNIT) BLOCK.

(1) Index register

A data memory address is modified according to the contents of the index register when a data memory

manipulation instruction is executed.

However, this modification is valid only when the IXE flag is set to “1”.

The address is modified by ORing the bank, row address, and column address of the data memory with the

contents of the index register, and an instruction is executed to the data memory specified by the result of

the OR operation (called actual address).

Address modification by the index register is subjected to all data memory manipulation instructions.

The following instructions are not subject to modification.

INC

RORC

INC

CALL

addr

MOVT

DBF, @AR

CALL

@AR

PUSH

RET

POP

RETSK

PEEK

WR, rf

RETI

POKE

rf, WR

GET

DBF, p

PUT

p, DBF

STOP

addr

HALT

@AR

NOP

(2) Data memory row address pointer

When a general register indirect transfer instruction (“MOV @r, m”, “MOV m, @r”) is executed, the address

of the indirect transfer destination is modified.

This modification, however, is valid only when the MPE flag is set to “1”.

To modify the address, the bank and row address at the indirect transfer destination are replaced with the

contents of the data memory row address pointer.

Instructions other than the general register indirect transfer instruction is not subject to address modifica-

tion.

(3) Index register increment instruction (“INC IX”)

This instruction increments the contents of the index register by one at a time.

Because the index register consists of 9 bits, if the “INC IX” instruction is executed when the contents of

the index register are “1FFH”, the index register is cleared to “000H”.

UPD17010GF Datasheet(PDF) 45 Page - NEC

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