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AN969 Datasheet(PDF) 5 Page - STMicroelectronics |
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AN969 Datasheet(HTML) 5 Page - STMicroelectronics |
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5 / 10 page ![]() 5/10 SCI COMMUNICATION BETWEEN ST7 AND PC 3 ST72F264 CONFIGURATION This application was implemented with a ST72F264. This microcontroller uses a 16 MHz ex- ternal clock (quartz). A description of the baud rate selection is given later in this application note. 3.1 GENERAL INITIALIZATION The ST72F264 internal clock (fCPU) works at 16MHz/2 = 8MHz. Two pins of the ST7 are used : - the TDO pin (Transmit Data Output, alternate function of PA7). - the RDI pin (Receive Data Input, alternate function of PA5). The PA7, PA5 pins must be initialized as floating inputs (please refer to the datasheet), the value of the Port A Data Register does not matter. 3.2 SCI CONFIGURATION The peripheral is configured using the 2 SCI Control Registers (SCICR1, SCICR2), and the Baud Rate Register (BRR) or the 2 extended baud rate registers of the ST72F264 (ETPR, ERPR). As in this application a polling strategy is used, SCI interruptions are disabled (TIE, TCIE, RIE, ILIE bits of SCICR2 register are reset). 3.2.1 Resetting control registers First, the reset status is forced to the control registers and pending interrupts are cleared. 3.2.2 Baud rates selection Then the baud rates must be selected. We should always have the same baud rates in the PC and in the SCI. In this application, the Extended Transmit Prescaler division Register (ETPR) and the Ex- tended Receive Prescaler division Register (ERPR) are not used and so are in reset state. Therefore the baud rates are calculated as follows: TX = fCPU/(16*PR*TR) RX = fCPU/(16*PR*RR) where PR = 1, 3, 4 or 13 (SCP0 and SCP1 bits in the BRR register), TR = 1, 2, 4, 8, 16, 32, 64 or 128 (SCT0, SCT1 and SCT2 bits of the BBR register) and RR = 1, 2, 4, 8, 16, 32, 64 or 128 (SCR0, SCR1 and SCR2 bits of the BRR register). For example, in our application, if we want 9600 as baud rate, we have to choose PR = 13 and TR = RR = 4. |
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