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ST9 EXTERNAL MEMORY INTERFACE CONFIGURATION

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Tips:

– The wait cycles added on the clock always refer to the internal clock (INTCLK) and not to

the CPUCLK. It means that if you choose 3 wait states for example, there will be three

INTCLK clock cycles added to the CPU clock (CPUCLK). During the wait states, the CPU-

CLK will remain high for the number of periods of INTCLK corresponding to the number of

wait states programmed (3 in this example).

– Be careful of the reset values of the control bits in the registers EMR2 and WCR (LAS,

UAS, LDS, UDS). By default, the maximum number of wait states is inserted. So, if your

memory can work faster, you must remember to change the value of these bits to increase

the speed of the ST9 external memory interface.

2.5 MMU CONFIGURATION

You will also have to configure your Memory Management Unit to access your external

memory. This will be exactly the same as when you configure your internal memory:

– You have to load the correct value in the MMU registers in order to point to your correspond-

ing external memory pages or segments (DPR0, DPR1, DPR2, DPR3, CSR, ISR, DMASR

registers).

– You have to add your external memory description and mapping in your scriptfile.

– Don’t forget to describe your external memory also in the emulator configuration file ‘hard-

ware.gdb’.

Please refer to the ST9 microcontroller datasheet, to the GNU C Compiler User Manual, and

to the Emulator User Manual for further details on these configurations.