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ST9 EXTERNAL MEMORY INTERFACE CONFIGURATION

Figure 1. External memory Read/Write with and without a programmable wait for MC = 0

1.2 LARGE MEMORY MODEL

This model is supported by x250, x150 and x124 devices.

In this model, you can address all the ST9 memory space (4Mbytes), using a 22-bit address

bus output on the ST9 ports.

The signals used in the large memory model interface are the following:

– I/O Port 0 (8 pins): same function as small memory model (A[0..7]/D[0..7]).

– I/O Port 1 (8 pins): same function as small memory model (A[8..15]).

– I/O Port 9 (6 pins): outputs the MMU bits of the address (A[16..21]).

– Address Strobe ASn: same function as small memory model.

– Data Strobe DSn: same function as small memory model.

– Data Strobe 2 DS2n: if enabled, this pin can be used as a second Data Strobe. In this case,

DSn addresses the external upper memory block while DS2n addresses the external lower

memory block. The upper memory is located at addresses >200000h (A21=1, typically

RAM), and the lower memory is located at addresses <200000h (A21=0, typically ROM).

– Read/Write RWn: same function as small memory model.

AS STRETCH

DS STRETCH

ADDRESS

ADDRESS

ADDRESS

ADDRESS

DATA IN

DATA IN

DATA OUT

DATA

T1

T2

T1

T2

NO WAIT CYCLE

1 ASN WAIT CYCLE

1 DSN WAIT CYCLE

ASN

P1

DSN

P0

RWN

P0

RWN

ADDRESS

ADDRESS

CPU

CLOCK

INTERNAL

CLOCK