AN3265

Application description

Doc ID 17860 Rev 1

7/19

which makes the oscillator loose his balance. This induces a clock disruption thus simulating

an HSE oscillator failure. When this kind of hardware failure occurs, the CSS automatically

switches the master clock from HSE to HSI. If the CSS is disabled, the IWDG handles the

hardware failure since it is clocked by the LSI clock which stays active even when the master

clock fails.

an oscilloscope to CCO (PE0 pin).

LD2, LD3, LD4, and LD5 monitor the current state of the application. At application startup,

only LD2 blinks. Each pushbutton event makes the application execution progress as

described in Figure 2.

Figure 2 describes the application principle and the actions performed at each transition.