PM0020 datasheet(17/87 Pages) STMICROELECTRONICS

17 / 87 page

PM00020

STR91xFA Flash memory

17/87

1.8.1

JTAG access protection

You can protect the entire STR91xFA device from read or debug access through the JTAG

port by setting the SECURITY bit in the Protection Level 2 register (see Section 1.13.2.).

Once SECURITY is set, the Flash content cannot be read by JTAG. Only a full chip erase

via JTAG can erase the SECURITY bit.

A secured device will not respond to JTAG program or erase commands other than Full Chip

Erase, Read User Code and Read ID Code commands. The SECURITY bit has no impact

on CUI commands.

1.9

Sector write protection

Sector write protection is managed on 2 levels:

●

Protection Level 1

–

Level 1 protection is controlled by the volatile Protection Level 1 register.

–

Each sector has a level 1 write protection bit (see Section 1.13.4). After a device

reset, all sectors are protected.

–

You are free to modify the protection status of any sectors that are not protected by

the Protection Level 2. This can be done from the application using a CUI Program

Protection Level 1 command, see Section 1.12.5.

●

Protection Level 2

–

Level 2 protection is controlled by the non-volatile Protection Level 2 register

–

Each sector has a Level 2 write protection bit (see Section 1.13.4). When the bit is

set through the JTAG, the sector is always write protected. It can be unprotected

only by erasing the bit via JTAG.

1.10

Command user interface (CUI)

Program and Erase commands are written to the Command User Interface. An on-chip

Program/Erase Controller simplifies the process of programming or erasing the memory by

taking care of all of the special operations that are required to update the memory contents.

The end of a Program or Erase operation can be detected and any error conditions

identified in the Bank Status Registers. The command set required to control the memory is

consistent with JEDEC standards.

Erase can be suspended in order to perform either read or program in another sector and

then resumed. Program can be suspended to read data in any other sector and then

resumed. The two banks are protected during power-up.

The device features 2 different levels of protection to avoid unwanted program/erase

operations. The sectors can be protected at Level 1 by the Sector Protect command or by

the Protection Level 2 Register programmed via JTAG. All Program or Erase operations are

aborted when the device is reset or powered off.

When the application accesses an address in Flash memory, the Command User Interface

(CUI) decodes it as an instruction to the Program/Erase Controller (FPEC). The Bank Status

Registers indicate the status resulting from the command. They can be read at any time

during programming or erase to monitor the progress of the operation and to verify its

successful completion.

PM0020 Datasheet(PDF) 17 Page - STMicroelectronics

PM0020 Datasheet(HTML) 17 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87

Datasheet Download

Link URL