UPD753012 datasheet(10/80 Pages) NEC

10 / 80 page

µPD753012, 753016, 753017

3.2 Pins Other than Port Pins (1/2)

Pin Name

Input/Output

Dual

Function

At Reset

I/O Circuit

Function Pin

TYPE Note 1

TI0

Input

P13

Inputs external event pulses to the timer/event

Input

B -C

TI1

P12/INT2

counter.

TI2

PTO0

Output

P20

Timer/event counter output

Input

E-B

PTO1

P21

PTO2

P22/PCL

PCL

P22/PTO2

Clock output

BUZ

P23

Any frequency output (for buzzer output

or system clock trimming)

SCK

Input/Output

P01

Serial clock input/output

Input

F -A

SO/SB0

P02

Serial data output

F -B

Serial bus data input/output

SI/SB1

P03

Serial data input

M -C

Serial bus data input/output

INT4

Input

P00

Edge detection vectored interrupt input (both

Input

rising edge and falling edge detection)

INT0

Input

P10

Input

B -C

INT1

P11

INT2

Input

P12/TI1/TI2

Edge-detection-testable input

Asynchronous

Input

B -C

KR0-KR3

Input

P60-P63

Falling edge detection testable input

Input

F -A

KR4-KR7

Input

P70-P73

Falling edge detection testable input

Input

F -A

S0-S23

Output

–

Segment signal output

Note 2

G-D

S24-S31

Output

BP0-BP7

Segment signal output

Note 2

H-A

COM0-COM3

Output

–

Common signal output

Note 2

G-B

VLC0-VLC2

–

LCD drive power

–

On-chip split resistor is enable (mask option).

BIAS

Output

–

Output for external split resistor disconnect

Note 3

–

LCDCL Note 4

Output

P30

Clock output for externally expanded driver

Input

E-B

SYNC Note 4

Output

P31

Clock output for externally expanded driver sync

Input

E-B

Input

–

Crystal/ceramic connection pin for the main

–

system clock oscillator. When inputting the

external clock, input the external clock to pin

X1, and the reverse phase of the external clock

to pin X2.

Notes 1.

Circled characters indicate the Schmitt trigger input.

Each displays output selects the following VLCX as input source.

S0-S31: VLC1, COM0-COM2: VLC2, COM3: VLC0.

When a split resistor is contained .......

Low level

When no split resistor is contained ......

High impedance

These pins are provided for future system expansion. At present, these pins are used only as pins

P30 and P31.

Edge detection vectored

With noise eliminator

interrupt input (detection

asynchronous selection

edge can be selected)

possible

Noise eliminator can be

Asynchronous

selected. (Only P10/INT0)

UPD753012 Datasheet(PDF) 10 Page - NEC

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