 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
UPD78323LP Datasheet(PDF) 40 Page - NEC |
|
|
|||||||||||||||||||||||||||||
UPD78323LP Datasheet(HTML) 40 Page - NEC |
|
|
40 / 86 page  40 µPD78323, 78324 3.10 WATCHDOG TIMER The watchdog timer is used to prevent program overrun and deadlock. Normal operation of the program or system can be confirmed by checking that no watchdog timer interrupt has been generated. Thus, an instruction to clear the watchdog timer (timer start) is set into each program module. If the watchdog timer clear instruction is not cleared within the time period set into the watchdog timer and the watchdog timer overflows, a watchdog timer interrupt is generated, and a low level is generated to WDTO pin, thereby notifying of an error in the program. The watchdog timer can also be used to maintain the oscillation stabilizing time of the oscillator after the stop mode has been released. Figure 3-8 shows the watchdog timer configuration. Figure 3-8. Watchdog Timer Configuration fCLK/28 fCLK/210 fCLK/212 Watchdog Timer (8 Bits) Clear Timer (5 Bits) Oscillation Stabilizing Time Controller INTWDT WDTO WDT CLR WDT STOP Overflow |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
