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CC3200MODR1M2AMOBT Datasheet(PDF) 49 Page - Texas Instruments |
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CC3200MODR1M2AMOBT Datasheet(HTML) 49 Page - Texas Instruments |
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49 / 66 page ![]() M4PowerON EnableClktoM4,Release ResettoM4 CortexLoadsthePCwithcontentsof 0x4location,whichisinROMandpart ofBootCode. Device-Init done? ExecuteDeviceInit (FromSecureROM) Clear Device-Init-Done SOP=UARTLOAD Invoke downloader Downloadthecodeusing SLProgrammerandjump totheapplication InfiteLoop Valid Appscodein SFLASH? no yes SWAS032-012 BootMode= (Fn2WJorFn4WJ) (SeeNote.) BootMode=LDfrUART (SeeNote.) yes no no yes Jumptotheusercode. CC3200MOD www.ti.com SWRS166 – DECEMBER 2014 Note: For definitions of the SoP mode functional configurations, see Table 5-6. Figure 5-3. Bootloader Flow Chart 5.9.2 Invocation Sequence/Boot Mode Selection The following sequence of events occur during the Cortex processor boot: 1. After power-on-reset (POR), the processor starts execution. 2. The processor jumps to the first few lines (FFL) of code in the ROM to determine if the current boot is the first device-init boot or the second MCU boot. The determination is based on the Device-Init flag in a secure register. The Device-Init flag is set out of POR. The registers in the secure region are accessible only in the device-init mode. 3. If the current boot is the first boot, the processor executes the device-init code from ROM. 4. At the end of the boot, the processor clears the Device-Init flag and changes the master ID of the processor and the DMA. These registers are part of the secure region. 5. The processor resets itself, initiating a second boot. 6. During the second boot, the processor rereads the Device-Init flag, the bit is cleared, and the processor obtains a different master ID. 7. After executing FFL and the unsecure boot code, the processor jumps to the developer code (application). 8. For the rest of the operation (until the next power cycle), the Cortex mode is designated the MCU. During this phase, access to the secure region is restricted. 5.9.3 Boot Mode List The CC3200 device implements a sense-on-power (SoP) scheme to determine the device operation mode. The device can be configured to power up in one of the three following modes: • Fn4WJ: Functional mode with a 4-wire JTAG mapped to fixed pins. • Fn2WJ: Functional mode with a 2-wire SWD mapped to fixed pins. • LDfrUART: UART load mode to flash the system during development and in OEM assembly line (for example, serial flash connected to the CC3200R device). Copyright © 2014, Texas Instruments Incorporated Detailed Description 49 Submit Documentation Feedback |
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