PIC16F872SLASHSP datasheet(15/160 Pages) MICROCHIP

15 / 160 page

Preliminary

DS30221A-page 15

PIC16F872

2.2.2.4

PIE1 REGISTER

The PIE1 register contains the individual enable bits for

the peripheral interrupts.

PIE1 REGISTER (ADDRESS 8Ch)

Note:

Bit PEIE (INTCON<6>) must be set to

enable any peripheral interrupt.

R/W-0

—

ADIE

—

SSPIE

CCP1IE

TMR2IE TMR1IE

R = Readable bit

W = Writable bit

U = Unimplemented bit,

read as ‘0’

- n= Value at POR reset

bit7

bit0

bit 7:

Reserved: Always maintain this bit clear

bit 6:

ADIE: A/D Converter Interrupt Enable bit

= Enables the A/D converter interrupt

= Disables the A/D converter interrupt

bit 5-4:

Reserved: Always maintain this bit clear

bit 3:

SSPIE: Synchronous Serial Port Interrupt Enable bit

= Enables the SSP interrupt

= Disables the SSP interrupt

bit 2:

CCP1IE: CCP1 Interrupt Enable bit

= Enables the CCP1 interrupt

= Disables the CCP1 interrupt

bit 1:

TMR2IE: TMR2 to PR2 Match Interrupt Enable bit

= Enables the TMR2 to PR2 match interrupt

= Disables the TMR2 to PR2 match interrupt

bit 0:

TMR1IE: TMR1 Overflow Interrupt Enable bit

= Enables the TMR1 overflow interrupt

= Disables the TMR1 overflow interrupt

PIC16F872/SP Datasheet(PDF) 15 Page - Microchip Technology

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