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PIC17C752-08/P Datasheet(PDF) 123 Page - Microchip Technology

Part # PIC17C752-08/P
Description  High-Performance 8-Bit CMOS EPROM Microcontrollers
PDF  320 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC17C752-08/P Datasheet(HTML) 123 Page - Microchip Technology

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© 1997 Microchip Technology Inc.
Preliminary
DS30264A-page 123
PIC17C75X
15.0 SYNCHRONOUS SERIAL
PORT (SSP) MODULE
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The SSP module can
operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I2C)
Refer to Application Note AN578,
"Use of the SSP
Module in the I 2C Multi-Master Environment."
Figure 15-1, Figure 15-2, and Figure 15-3 show the
block diagrams for the three different modes of opera-
tion.
FIGURE 15-1: SPI MODE BLOCK
DIAGRAM
Read
Write
Internal
data bus
SSPSR reg
SSPBUF reg
SSPM3:SSPM0
bit0
shift
clock
SS Control
Enable
Edge
Select
Clock Select
TMR2 output
TOSC
Prescaler
4, 16, 64
2
Edge
Select
2
4
Data to TX/RX in SSPSR
Data direction bit
2
SMP:CKE
SDI
SDO
SS
SCK
FIGURE 15-2: I2C SLAVE MODE BLOCK
DIAGRAM
FIGURE 15-3: I2C MASTER MODE BLOCK
DIAGRAM
Read
Write
SSPSR reg
Match detect
SSPADD reg
Start and
Stop bit detect
SSPBUF reg
Internal
data bus
Addr Match
Set, Reset
S, P bits
(SSPSTAT reg)
SCL
shift
clock
MSb
LSb
SDA
Read
Write
SSPSR reg
Match detect
SSPADD reg
Start and Stop bit
detect / generate
SSPBUF reg
Internal
data bus
Addr Match
Set/Clear S bit
Clear/Set P, bits
(SSPSTAT reg)
SCL
shift
clock
MSb
LSb
SDA
Baud Rate Generator
7
SSPADD<6:0>
and
and Set SSPIF



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