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PIC16C72-04/SS Datasheet(PDF) 63 Page - Microchip Technology

Part # PIC16C72-04/SS
Description  8-Bit CMOS Microcontrollers with A/D Converter
PDF  288 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16C72-04/SS Datasheet(HTML) 63 Page - Microchip Technology

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© 1997 Microchip Technology Inc.
DS30390E-page 63
PIC16C7X
7.3.1
SWITCHING PRESCALER ASSIGNMENT
The prescaler assignment is fully under software con-
trol, i.e., it can be changed “on the fly” during program
execution.
EXAMPLE 7-1:
CHANGING PRESCALER (TIMER0
→WDT)
To change prescaler from the WDT to the Timer0 mod-
ule use the sequence shown in Example 7-2.
EXAMPLE 7-2:
CHANGING PRESCALER (WDT
→TIMER0)
CLRWDT
;Clear WDT and prescaler
BSF
STATUS, RP0 ;Bank 1
MOVLW
b'xxxx0xxx' ;Select TMR0, new prescale value and
MOVWF
OPTION_REG
;clock source
BCF
STATUS, RP0 ;Bank 0
TABLE 7-1:
REGISTERS ASSOCIATED WITH TIMER0
Note:
To avoid an unintended device RESET, the
following instruction sequence (shown in
Example 7-1) must be executed when
changing the prescaler assignment from
Timer0 to the WDT. This sequence must
be followed even if the WDT is disabled.
1)
BSF
STATUS, RP0
;Bank 1
Lines 2 and 3 do NOT have to
be included if the final desired
prescale value is other than 1:1.
If 1:1 is final desired value, then
a temporary prescale value is
set in lines 2 and 3 and the final
prescale value will be set in lines
10 and 11.
2)
MOVLW
b'xx0x0xxx'
;Select clock source and prescale value of
3)
MOVWF
OPTION_REG
;other than 1:1
4)
BCF
STATUS, RP0
;Bank 0
5)
CLRF
TMR0
;Clear TMR0 and prescaler
6)
BSF
STATUS, RP1
;Bank 1
7)
MOVLW
b'xxxx1xxx'
;Select WDT, do not change prescale value
8)
MOVWF
OPTION_REG
;
9)
CLRWDT
;Clears WDT and prescaler
10) MOVLW
b'xxxx1xxx'
;Select new prescale value and WDT
11) MOVWF
OPTION_REG
;
12) BCF
STATUS, RP0
;Bank 0
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on all
other resets
01h,101h
TMR0
Timer0 module’s register
xxxx xxxx
uuuu uuuu
0Bh,8Bh,
10Bh,18Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
81h,181h
OPTION
RBPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
1111 1111
85h
TRISA
—
—
PORTA Data Direction Register
--11 1111
--11 1111
Legend: x = unknown, u = unchanged, - = unimplemented locations read as '0'. Shaded cells are not used by Timer0.



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