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PIC16C72-04/SS Datasheet(PDF) 88 Page - Microchip Technology |
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PIC16C72-04/SS Datasheet(HTML) 88 Page - Microchip Technology |
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88 / 288 page ![]() PIC16C7X DS30390E-page 88 © 1997 Microchip Technology Inc. FIGURE 11-13: SPI MODE TIMING (SLAVE MODE WITH CKE = 1) (PIC16C76/77) TABLE 11-2: REGISTERS ASSOCIATED WITH SPI OPERATION (PIC16C76/77) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other resets 0Bh,8Bh. 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF(1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 8Ch PIE1 PSPIE(1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 87h TRISC PORTC Data Direction Register 1111 1111 1111 1111 13h SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register xxxx xxxx uuuu uuuu 14h SSPCON WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000 85h TRISA — — PORTA Data Direction Register --11 1111 --11 1111 94h SSPSTAT SMP CKE D/A P S R/W UA BF 0000 0000 0000 0000 Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the SSP in SPI mode. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C76, always maintain these bits clear. SCK (CKP = 0) SDI (SMP = 0) SSPIF bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 SCK (CKP = 1) SDO bit7 bit0 SS (not optional) Applicable Devices 72 73 73A 74 74A 76 77 |
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