PIC18F020-ISLASHP datasheet(70/176 Pages) MICROCHIP

70 / 176 page

PIC18F010/020

DS41142A-page 68

Preliminary

 2001 Microchip Technology Inc.

FIGURE 9-2:

BLOCK DIAGRAM OF

RB<2:0> PINS

FIGURE 9-3:

BLOCK DIAGRAM OF

RB3 PIN

Data Latch

From other

WPUBx(2)

VDD

I/O

Data Bus

WR LATB

WR TRISB

Set RBIF

TRIS Latch

RD TRISB

RD PORTB

RB pins

Weak

Pull-up

RD PORTB

Latch

TTL

Input

Buffer

pin(1)

Note 1: I/O pins have diode protection to VDD and VSS.

Buffer

2: To enable weak pull-ups, set the appropriate TRIS bit(s)

and clear the WPUB bit(s) and RBPU bit.

RD LATB

PORTB

IOCB Register

WR IOCB

RB<1:0> in Serial Programming mode

RB2/T0CKI/INT0

Data Latch

From other

I/O

Data Bus

WR LATB

WR TRISB

Set RBIF

TRIS Latch

RD TRISB

RD PORTB

RB pins

RD PORTB

Latch

TTL

Input

Buffer

pin(1)

Note 1: I/O pins have diode protection to VDD and VSS.

Buffer

MCLR

2: To enable weak pull-ups, set the appropriate TRIS bit(s)

and clear the WPUB bit(s) and RBPU bit.

RD LATB

PORTB

IOCB Register

WR IOCB

WPUBx(2)

Weak

Pull-up

VDD

Open Drain

PIC18F020-I/P Datasheet(PDF) 70 Page - Microchip Technology

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