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PIC18F020-I/P Datasheet(PDF) 14 Page - Microchip Technology |
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PIC18F020-I/P Datasheet(HTML) 14 Page - Microchip Technology |
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14 / 176 page ![]() PIC18F010/020 DS41142A-page 12 Preliminary 2001 Microchip Technology Inc. 2.7 Effects of SLEEP Mode on the On-chip Oscillator When the device executes a SLEEP instruction, the on- chip clocks and oscillator are turned off and the device is held at the beginning of an instruction cycle (Q1 state). With the oscillator off, the OSC1 and OSC2 sig- nals will stop oscillating. Since all the transistor switch- ing currents have been removed, SLEEP mode achieves the lowest current consumption of the device (only leakage currents). Enabling any on-chip feature that will operate during SLEEP will increase the current consumed during SLEEP. The user can wake from SLEEP through external RESET, Watchdog Timer Reset or through an interrupt. TABLE 2-3: OSC1 AND OSC2 PIN STATES IN SLEEP MODE OSC Mode OSC1 Pin OSC2 Pin Internal Oscillator Floating, external resistor should pull high At logic low RCIO Floating, external resistor should pull high Configured as PORTB, RB4 EC Floating At logic low LP, XT, and HS Feedback inverter disabled, at quiescent voltage level Feedback inverter disabled, at quiescent voltage level Note: See Table 3-1 in the RESET Section, for time-outs due to SLEEP and MCLR Reset. |
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