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PIC18F2220-I/ML Datasheet(PDF) 28 Page - Microchip Technology |
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PIC18F2220-I/ML Datasheet(HTML) 28 Page - Microchip Technology |
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28 / 388 page ![]() PIC18F2220/2320/4220/4320 DS39599C-page 26 2003 Microchip Technology Inc. REGISTER 2-2: OSCCON REGISTER R/W-0 R/W-0 R/W-0 R/W-0 R(1) R-0 R/W-0 R/W-0 IDLEN IRCF2 IRCF1 IRCF0 OSTS IOFS SCS1 SCS0 bit 7 bit 0 bit 7 IDLEN: Idle Enable bit 1 = Idle mode enabled; CPU core is not clocked in power managed modes 0 = Run mode enabled; CPU core is clocked in power managed modes bit 6-4 IRCF2:IRCF0: Internal Oscillator Frequency Select bits 111 = 8 MHz (8 MHz source drives clock directly) 110 = 4 MHz 101 = 2 MHz 100 = 1 MHz 011 = 500 kHz 010 = 250 kHz 001 = 125 kHz 000 = 31 kHz (INTRC source drives clock directly) bit 3 OSTS: Oscillator Start-up Time-out Status bit(1) 1 = Oscillator start-up time-out timer has expired; primary oscillator is running 0 = Oscillator start-up time-out timer is running; primary oscillator is not ready bit 2 IOFS: INTOSC Frequency Stable bit 1 = INTOSC frequency is stable 0 = INTOSC frequency is not stable bit 1-0 SCS1:SCS0: System Clock Select bits 1x = Internal oscillator block (RC modes) 01 = Timer1 oscillator (Secondary modes)(2) 00 = Primary oscillator (Sleep and PRI_IDLE modes) Note 1: Depends on state of IESO bit in Configuration Register 1H. 2: SCS0 may not be set while T1OSCEN (T1CON<3>) is clear. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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