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PIC18F2220-I/ML Datasheet(PDF) 16 Page - Microchip Technology |
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PIC18F2220-I/ML Datasheet(HTML) 16 Page - Microchip Technology |
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16 / 388 page  PIC18F2220/2320/4220/4320 DS39599C-page 14 2003 Microchip Technology Inc. TABLE 1-3: PIC18F4220/4320 PINOUT I/O DESCRIPTIONS Pin Name Pin Number Pin Type Buffer Type Description PDIP TQFP QFN MCLR/VPP/RE3 MCLR VPP RE3 118 18 I P I ST ST Master Clear (input) or programming voltage (input). Master Clear (Reset) input. This pin is an active-low Reset to the device. Programming voltage input. Digital input. OSC1/CLKI/RA7 OSC1 CLKI RA7 13 30 32 I I I/O ST CMOS TTL Oscillator crystal or external clock input. Oscillator crystal input or external clock source input. ST buffer when configured in RC mode, CMOS otherwise. External clock source input. Always associated with pin function OSC1. (See related OSC1/CLKI, OSC2/CLKO pins.) General purpose I/O pin. OSC2/CLKO/RA6 OSC2 CLKO RA6 14 31 33 O O I/O — — TTL Oscillator crystal or clock output. Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. In RC mode, OSC2 pin outputs CLKO which has 1/4 the frequency of OSC1 and denotes the instruction cycle rate. General purpose I/O pin. PORTA is a bidirectional I/O port. RA0/AN0 RA0 AN0 219 19 I/O I TTL Analog Digital I/O. Analog input 0. RA1/AN1 RA1 AN1 320 20 I/O I TTL Analog Digital I/O. Analog input 1. RA2/AN2/VREF-/CVREF RA2 AN2 VREF- CVREF 421 21 I/O I I O TTL Analog Analog Analog Digital I/O. Analog input 2. A/D reference voltage (Low) input. Comparator reference voltage output. RA3/AN3/VREF+ RA3 AN3 VREF+ 522 22 I/O I I TTL Analog Analog Digital I/O. Analog input 3. A/D reference voltage (High) input. RA4/T0CKI/C1OUT RA4 T0CKI C1OUT 623 23 I/O I O ST/OD ST — Digital I/O. Open-drain when configured as output. Timer0 external clock input. Comparator 1 output. RA5/AN4/SS/LVDIN/ C2OUT RA5 AN4 SS LVDIN C2OUT 724 24 I/O I I I O TTL Analog TTL Analog — Digital I/O. Analog input 4. SPI slave select input. Low-Voltage Detect input. Comparator 2 output. RA6 See the OSC2/CLKO/RA6 pin. RA7 See the OSC1/CLKI/RA7 pin. Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels I = Input O = Output P = Power OD = Open-drain (no diode to VDD) Note 1: Default assignment for CCP2 when CCP2MX (CONFIG3H<0>) is set. 2: Alternate assignment for CCP2 when CCP2MX is cleared. |
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