LM5085MMXSLASHNOPB datasheet(12/33 Pages) TI

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Input

Voltage

STOP

RUN

LM5085

VIN

RT =

VOUT x 6.67 x 10

- 33.4

RT =

VOUT x 6 x 10

- 8.6

LM5085, LM5085-Q1

SNVS565I – NOVEMBER 2008 – REVISED AUGUST 2015

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Feature Description (continued)

(6)

For VIN = 48V and tD = 100ns, the simplified equation is:

(7)

7.3.3 Shutdown

The LM5085 can be shutdown by grounding the RT pin (see Figure 22). In this mode the PFET is held off, and

the VCC regulator is disabled. The internal operating current is reduced to the value shown in the graph

“Shutdown current vs. VIN”. The shutdown threshold at the RT pin is

≊0.73V, with ≊50mV of hysteresis.

Releasing the pin enables normal operation. The RT pin must not be forced high during normal operation.

Figure 22. Shutdown Implementation

7.3.4 Current Limiting

The LM5085 current limiting operates by sensing the voltage across either the RDS(ON) of Q1, or a sense resistor,

during the on-time and comparing it to the voltage across the resistor RADJ (see Figure 23). The current limit

function is much more accurate and stable over temperature when a sense resistor is used. The RDS(ON) of a

MOSFET has a wide process variation and a large temperature coefficient.

If the voltage across RDS(ON) of Q1, or the sense resistor, is greater than the voltage across RADJ, the current limit

comparator switches to turn off Q1. Current sensing is disabled for a blanking time of

≊100ns at the beginning of

the on-time to prevent false triggering of the current limit comparator due to leading edge current spikes.

Because of the blanking time and the turn-on and turn-off delays created by the PFET, the on-time at the PGATE

pin should not be set less than 150ns. An on-time shorter than that may prevent the current limit detection circuit

from properly detecting an over-current condition. The duration of the subsequent forced off-time is a function of

the input voltage and the voltage at the FB pin, as shown in the graph “Off-time vs. VIN and VFB”. The longer-

than-normal forced off-time allows the inductor current to decrease to a low level before the next on-time. This

cycle-by-cycle monitoring, followed by a forced off-time, provides effective protection from output load faults over

a wide range of operating conditions.

The voltage across the RADJ resistor is set by an internal 40µA current sink at the ADJ pin. When using Q1’s

RDS(ON) for sensing, the current at which the current limit comparator switches is calculated from:

ICL = 40µA x RADJ/RDS(ON)

(8)

When using a sense resistor (RSEN) the threshold of the current limit comparator is calculated from:

ICL = 40µA x RADJ/RSEN

(9)

When using Equation 8 or Equation 9, the tolerances for the ADJ pin current sink and the offset of the current

limit comparator should be included to ensure the resulting minimum current limit is not less than the required

maximum switch current. Simultaneously increasing the values of RADJ and RSEN decreases the effects of the

current limit comparator offset, but at the expense of higher power dissipation. When using a sense resistor, the

RSEN resistor value should be chosen within the practical limitations of power dissipation and physical size. For

example, for a 10A current limit, setting RSEN = 0.005Ω results in a power dissipation as high as 0.5W. Current

sense connections to the RSEN resistor, or to Q1, must be Kelvin connections to ensure accuracy.

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