AR0230CSSC00SUEA0-DRBR datasheet(32/36 Pages) ONSEMI

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AR0230CS/D Rev. 8, Pub. 11/15 EN

©Semiconductor Components Industries, LLC, 2015.

AR0230CS: 1/2.7-Inch 2.1 Mp/Full HD Digital Image Sensor

Power-On Reset and Standby Timing

Notes:

1. Xtal settling time is component-dependent, usually taking about 10 – 100 ms.

2. Hard reset time is the minimum time required after power rails are settled. In a circuit where Hard

reset is held down by RC circuit, then the RC time must include the all power rail settle time and

Xtal settle time.

3. It is critical that VDD_PLL is not powered up after the other power supplies. It must be powered

before or at least at the same time as the others. If the case happens that VDD_PLL is powered after

other supplies then sensor may have functionality issues and will experience high current draw on

this supply.

Table 20:

Power-Up Sequence

Definition

Symbol

Minimum

Typical

Maximum

Unit

VDD_PLL to VAA/VAA_PIX3

100

–

s

VAA/VAA_PIX to VDD_IO

100

–

s

VDD_IO to VDD

100

–

s

VDD to VDD_SLVS

100

–

s

Xtal settle time

–

301

–ms

Hard Reset

––

Internal Initialization

150000

–

EXTCLKs

PLL Lock Time

–

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