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VX6953CB Datasheet(PDF) 3 Page - STMicroelectronics |
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VX6953CB Datasheet(HTML) 3 Page - STMicroelectronics |
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3 / 107 page ![]() 8209023 Rev 5 3/107 VX6953CB Contents 4.2 Frame format description registers [0x0040 to 0x007F] . . . . . . . . . . . . . . 30 4.3 Analog gain description registers [0x0080 to 0x0097] . . . . . . . . . . . . . . . 31 4.4 Data format description registers [0x00C0 to 0x00FF] . . . . . . . . . . . . . . . 32 4.5 Setup registers [0x0100 to 0x01FF] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.6 Integration time and gain registers [0x0200 to 0x02FF] . . . . . . . . . . . . . . 34 4.7 Video timing registers [0x0300 to 0x03FF] . . . . . . . . . . . . . . . . . . . . . . . . 35 4.8 Image scaling registers [0x0400 to 0x04FF] . . . . . . . . . . . . . . . . . . . . . . 36 4.9 Image compression registers [0x0500 to 0x05FF] . . . . . . . . . . . . . . . . . . 37 4.10 Test pattern registers [0x0600 to 0x06FF] . . . . . . . . . . . . . . . . . . . . . . . . 37 4.11 Fifo water mark [0x0700 to 0x0701] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4.12 DPHY [0x0810 to 0x0811] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 4.13 Binning [0x0900 to 0x0902] and [0x170C to 0x1719] . . . . . . . . . . . . . . . . 38 4.14 Shading correction [0x0B00] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.15 Defect correction [0x0B05 to 0x0B09] . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 4.16 EDOF [0x0B80 to 0x0B8A] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.17 Color feedback registers [0x0B8C to 0x0B95] . . . . . . . . . . . . . . . . . . . . . 40 4.18 Integration time and gain parameter limit registers [0x1000 to 0x10FF] . 41 4.19 Video timing parameter limit registers [0x1100 to 0x11FF] . . . . . . . . . . . . 42 4.20 Image scaling parameter limit registers [0x1200 to 0x120B] . . . . . . . . . . 46 4.21 Image compression parameter registers [0x1300 to 0x13FF] . . . . . . . . . 46 4.22 CSI lane mode capability [0x1600 to 0x1602] . . . . . . . . . . . . . . . . . . . . . 46 4.23 Binning capability [0x1700 to 0x170B] . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 4.24 Manufacturer specific registers - Clipper 1 [0x31E8 to 0x31EB] . . . . . . . 47 5 Video data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 5.1 Frame format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6 Video timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.1 Output size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 6.1.1 Programmable addressable region of the pixel array . . . . . . . . . . . . . . 51 6.1.2 Programmable width and height for output image data . . . . . . . . . . . . . 52 6.1.3 Scaling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 6.1.4 Subsampling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 6.1.5 Binning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 |
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