ADN2913 datasheet(21/37 Pages) AD

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Data Sheet

ADN2913

Rev. A | Page 21 of 37

The delay-locked and PLLs contribute to overall jitter tolerance.

At low frequencies of input jitter on the data signal, the

integrator in the loop filter provides high gain to track large

jitter amplitudes with small phase error. In this case, the

oscillator is frequency modulated and jitter is tracked as in an

ordinary PLL. The amount of low frequency jitter that can be

tracked is a function of the DCO tuning range. A wider tuning

range gives larger tolerance of low frequency jitter. The internal

loop control word remains small for small jitter frequency so

that the phase shifter remains close to the center of the range

and, thus, contributes little to the low frequency jitter tolerance.

At medium jitter frequencies, the gain and tuning range of the

DCO are not large enough to track input jitter. In this case, the

DCO control word becomes large and saturates. As a result, the

DCO frequency remains at an extreme of the tuning range.

The size of the DCO tuning range, therefore, has only a small

effect on the jitter tolerance. The DLL control range is now larger;

therefore, the phase shifter tracks the input jitter. An infinite

range phase shifter is used on the clock. Consequently, the

minimum range of timing mismatch between the clock at the data

sampler and the retiming clock at the output is limited by the

depth of the FIFO to 32 UI.

There are two ways to acquire the data rate. The default mode is

for the frequency to lock to the input data, where a finite state

machine extracts frequency measurements from the data to

program the DCO and loop division ratio so that the sampling

frequency matches the data rate to within 250 ppm. The PLL is

enabled, driving this frequency difference to 0 ppm. The second

mode is to lock to the reference, in which case the user provides

a reference clock between 11.05 MHz and 176.8 MHz. Division

ratios must be written to a serial port register.

ADN2913 Datasheet(PDF) 21 Page - Analog Devices