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ADC12DL040CIVS/NOPB Datasheet(PDF) 28 Page - Texas Instruments

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Part # ADC12DL040CIVS/NOPB
Description  210mW A/D Converter
PDF  37 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DL040CIVS/NOPB Datasheet(HTML) 28 Page - Texas Instruments

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Clock line should be short
and cross no other lines.
Single Ground entry for all
Reference Components
All Analog Components
mounted over Analog
area of Ground Plane
Xfmr/Amplifier
Components
mounted over
Digital area of
Digital power line should be routed
away from analog power trace.
COMMON
GROUND
PLANE
Ground entry points
close to ground pins.
Analog power line should be routed
away from Digital power trace.
Driving source
located close
to converter.
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V
D
DB5
DB4
DB3
DB2
DB1
DB0/ABb
OEB
DR GND
DA11
DA10
DA9
DA8
DA7
DA6
V
D
VIN B-
VIN B+
AGND
V
RMB
V
RPB
V
RNB
V
REF
AGND
V
A
AGND
MULTIPLEX
V
RNA
V
RPA
V
RMA
VIN A+
VIN A-
ADC12DL040
All Digital
Ground Plane
6 x 100:
6 x 100:
OSC
LATCH
LATCH
ADC12DL040
SNAS250D – FEBRUARY 2005 – REVISED APRIL 2013
www.ti.com
Since digital switching transients are composed largely of high frequency components, total ground plane copper
weight will have little effect upon the logic-generated noise. This is because of the skin effect. Total surface area
is more important than is total ground plane volume.
Generally, analog and digital lines should cross each other at 90° to avoid crosstalk. To maximize accuracy in
high speed, high resolution systems, however, avoid crossing analog and digital lines altogether. It is important to
keep clock lines as short as possible and isolated from ALL other lines, including other digital lines. Even the
generally accepted 90° crossing should be avoided with the clock line as even a little coupling can cause
problems at high frequencies. This is because other lines can introduce jitter into the clock line, which can lead to
degradation of SNR. Also, the high speed clock can introduce noise into the analog chain.
Best performance at high frequencies and at high resolution is obtained with a straight signal path. That is, the
signal path through all components should form a straight line wherever possible.
Figure 40. Example of a Suitable Layout
Be especially careful with the layout of inductors. Mutual inductance can change the characteristics of the circuit
in which they are used. Inductors should not be placed side by side, even with just a small part of their bodies
beside each other.
The analog input should be isolated from noisy signal traces to avoid coupling of spurious signals into the input.
Any external component (e.g., a filter capacitor) connected between the converter's input pins and ground or to
the reference input pin and ground should be connected to a very clean point in the ground plane.
Figure 40 gives an example of a suitable layout. All analog circuitry (input amplifiers, filters, reference
components, etc.) should be placed in the analog area of the board. All digital circuitry and I/O lines should be
placed in the digital area of the board. The ADC12DL040 should be between these two areas. Furthermore, all
components in the reference circuitry and the input signal chain that are connected to ground should be
connected together with short traces and enter the ground plane at a single, quiet point. All ground connections
should have a low inductance path to ground.
28
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Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: ADC12DL040



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