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ADC12DL040CIVS/NOPB Datasheet(PDF) 30 Page - Texas Instruments

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Part # ADC12DL040CIVS/NOPB
Description  210mW A/D Converter
PDF  37 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

ADC12DL040CIVS/NOPB Datasheet(HTML) 30 Page - Texas Instruments

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ADC12DL040
SNAS250D – FEBRUARY 2005 – REVISED APRIL 2013
www.ti.com
If the amplifier exhibits overshoot, ringing, or any evidence of instability, even at a very low level, it will degrade
performance. A small series resistor at each amplifier output and a capacitor at the analog inputs (as shown in
Figure 38 and Figure 39) will improve performance. The LMH6702 and the LMH6628 have been successfully
used to drive the analog inputs of the ADC12DL040.
Also, it is important that the signals at the two inputs have exactly the same amplitude and be exactly 180º out of
phase with each other. Board layout, especially equality of the length of the two traces to the input pins, will
affect the effective phase between these two signals. Remember that an operational amplifier operated in the
non-inverting configuration will exhibit more time delay than will the same device operating in the inverting
configuration.
Operating with the reference pins outside of the specified range. As mentioned in Reference Pins, when
using an external reference, VREF should be in the range of
0.8V
≤ VREF ≤ 1.2V
(9)
Operating outside of these limits could lead to performance degradation.
Inadequate network on Reference Bypass pins (VRPA, VRNA, VRMA, VRPB, VRNB and VRMB). As mentioned in
Reference Pins, these pins should be bypassed with 0.1 µF capacitors to ground, and 10.0 µF capacitor should
be connected between pins VRPA and VRNA and between VRPB and VRNB for best performance.
Using a clock source with excessive jitter, using excessively long clock signal trace, or having other
signals coupled to the clock signal trace. This will cause the sampling interval to vary, causing excessive
output noise and a reduction in SNR and SINAD performance.
30
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Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: ADC12DL040



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