AMC7812BSPAPR datasheet(32/92 Pages) TI1

32 / 92 page

ToShift

ADC

ADC-0

Data

ADC-0

Temporary

Out-of-Limit

Alarm

ADC-7

Data

ADC-7

Temporary

ADC-15

Data

ADC-15

Temporary

DAVFBit

DAV

CH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

CH9

CH10

CH11

CH12

CH13

CH14

CH15

CONVERT

(ExternalTrigger)

ICONV

(Internal

Trigger)

Input

Range

Selection

AMC7812B

SBAS625A – SEPTEMBER 2013 – REVISED SEPTEMBER 2013

www.ti.com

The current conversion cycle stops immediately if:

•

A new trigger is issued.

•

The conversion mode changes.

•

Either ADC channel register is rewritten.

•

Any of the analog input threshold registers are rewritten.

When a new external or internal trigger activates, the ADC starts a new conversion cycle. The internal trigger

should not be issued at the same time the conversion mode is changed. If a '1' is simultaneously written to the

ICONV bit when changing the CMODE bit to '0' or '1', the current conversion stops and immediately returns to

the wait for ADC trigger state.

Double-Buffered ADC Data Registers

The host can access all 16, double-buffered ADC data registers, as shown in Figure 83. The conversion result

from the analog input with channel address n (where n = 0 to 15) is stored in the ADC-n-data register. When the

conversion of an individual channel completes, the data are immediately transferred into the corresponding ADC-

n temporary (TMPRY) register, the first stage of the data buffer. When the conversion of the last channel

completes, all data in the ADC-n TMPRY registers are simultaneously transferred into the corresponding ADC-n-

data registers, the second stage of the data buffer. However, if a data transfer is in progress between any ADC-

n-data register and the AMC shift register, no ADC-n-data registers are updated until the data transfer is

complete. The conversion result from channel address n is stored in the ADC-n-data register. For example, the

result from channel 0 is stored in the ADC-0-data register, and the result from channel 3 is stored in the ADC-3-

data register.

Figure 83. Double-Buffered ADC Structure

Submit Documentation Feedback

Product Folder Links: AMC7812B

AMC7812BSPAPR Datasheet(PDF) 32 Page - Texas Instruments

AMC7812BSPAPR Datasheet(HTML) 32 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL