PGND

CNTRL

OUT

OUT_A

OUT_B

OUT_A

OUT_B

N-Channel Active Clamp

P-Channel Active Clamp

LM5025A

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SNVS293E – DECEMBER 2004 – REVISED MARCH 2013

LM5025A is the ability to accurately configure either dead time (both off) or overlap time (both on) of the gate

driver outputs. The overlap / deadtime magnitude is controlled by the resistor value connected to the TIME pin of

the controller. The opposite end of the resistor can be connected to either REF for deadtime control or GND for

overlap control. The internal configuration detector senses the connection and configures the phase relationship

of the main and active clamp outputs. The magnitude of the overlap/dead time can be calculated as follows:

Figure 13. PWM Outputs

Compound Gate Drivers

The LM5025A contains two unique compound gate drivers, which parallel both MOS and Bipolar devices to

provide high drive current throughout the entire switching event. The Bipolar device provides most of the drive

current capability and provides a relatively constant sink current which is ideal for driving large power MOSFETs.

As the switching event nears conclusion and the Bipolar device saturates, the internal MOS device continues to

provide a low impedance to compete the switching event.

During turn-off at the Miller plateau region, typically around 2V - 3V, is where gate driver current capability is

needed most. The resistive characteristics of all MOS gate drivers are adequate for turn-on since the supply to

output voltage differential is fairly large at the Miller region. During turn-off however, the voltage differential is

small and the current source characteristic of the Bipolar gate driver is beneficial to provide fast drive capability.

Figure 14. Compound Gate Drivers

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