DP8572AM datasheet(18/22 Pages) NSC

18 / 22 page

Control and Status Register Address Bit Map

1 Reset by

Main Status Register

PS e XRS e X

ADDRESS e 00H

writing

RW1

1 to bit

Page

RAM

Alarm

Periodic

Power Fail

Interrupt

2 Setreset by

Select

Interrupt

Status

voltage at

PFAIL pin

3 Reset when

all pending

interrupts

are removed

Periodic Flag Register

PS e 0RS e 0

Address e 03H

4 Read Osc fail

RW4

Write 0 Batt-

Test

Osc Fail

1 ms

10 ms

100 ms

Seconds

10 Second

Minute

Backed Mode

Mode

Single Supply

Flag

Write 1 Single

Supply Mode

5 Reset by

positive edge

of read

Time Save Control Register

PS e 0RS e 0

Address e 04H

Time Save

Low Battery

Power Fail

6 Set and reset

by VBB

Enable

Flag

Delay

RAM

voltage

Enable

Real Time Mode Register

PS e 0RS e 1

Address e 01H

Crystal

RAM

Interrupt EN

Clock

1224 Hr

Leap Year

All Bits RW

Freq XT1

Freq XT0

on Back-Up

StartStop

Mode

MSB

LSB

Output Mode Register

PS e 0RS e 1

Address e 02H

MFO as

RAM

All Bits RW

Crystal

Interrupt Control Register 0

PS e 0RS e 1

Address e 03H

1 ms

10 ms

100 ms

Seconds

10 Second

Minute

RAM

Interrupt

All Bits RW

Enable

Interrupt Control Register 1

PS e 0RS e 1

Address e 04H

Power Fail

Alarm

DOW

Month

DOM

Hours

Minute

Second

Interrupt

All Bits RW

Enable

DP8572AM Datasheet(PDF) 18 Page - National Semiconductor (TI)

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