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LM8207MT/NOPB Datasheet(PDF) 25 Page - Texas Instruments |
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LM8207MT/NOPB Datasheet(HTML) 25 Page - Texas Instruments |
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25 / 32 page ![]() LM8207 www.ti.com SNOSAL5A – SEPTEMBER 2005 – REVISED MARCH 2013 LAYOUT RECOMMENDATIONS A proper layout is necessary for optimum performance of the LM8207. A low impedance and clean ground plane is recommended. The traces from the VSS pin to the ground plane should be as short as possible. Decoupling capacitors should be placed very close to the VDD pin. Connections of these decoupling capacitors to the ground plane should be very short. An additional decoupling capacitor for OUT_VREF is recommended. Due to the heavy current peaks and short transitions at the VCOM node, traces from the output of the VCOM buffer should be low impedance and as short as possible, to minimize both voltage drops over the trace and unwanted EM disturbances. Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 25 Product Folder Links: LM8207 |
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