LMH6503MTSLASHNOPB datasheet(5/33 Pages) TI1

5 / 33 page

LMH6503

www.ti.com

SNOSA78E – OCTOBER 2003 – REVISED APRIL 2013

Electrical Characteristics

(1) (continued)

Unless otherwise specified, all limits ensured for TJ = 25°C, VS = ±5V, AV(MAX) = 10, VCM = 0V, RF = 1kΩ, RG = 174Ω, VIN_DIFF

= ±0.1V, RL = 100Ω, VG = +1V. Boldface limits apply at the temperature extremes.

Parameter

Test Conditions

Min(2)

Typ(2)

Max(2)

Units

DC & Miscellaneous Performance

GACCU

Gain Accuracy (see Application

VG =1.0V

+0.25

+0.9/

−0.4

Information)

0V < VG < 1V

±0.3

+1.3/

−1.5

−0.7V < VG < 1V

±0.4

+4.4/

−4.3

G Match

Gain Matching (see Application

VG = 1.0

–

±0.7

Information)

0 < VG < 1V

–

+1.7/

−1.1

−0.7V < VG < 1V

–

+4.0/

−4.7

Gain Multiplier (see Application

1.58

1.72

1.87

V/V

Information)

1.58

1.91

VCM

Input Voltage Range

Pin 3 & 6 Common Mode,

±2.0

±2.2

|CMRR| > 50dB(6)

±1.80

VIN_ DIFF

Differential Input Voltage

Across pins 3 & 6

±0.34

±0.37

±0.28

IRG MAX

RG Current

Pins 4 & 5

±1.70

±2.30

±1.60

IBIAS

Bias Current

Pins 3 & 6(7)

µA

Pins 3 & 6(7),

VS= ±2.5V

TCBIAS

Bias Current Drift

Pin 3 & 6(8)

100

nA/°C

I OFF

Offset Current

Pin 3 & 6

0.01

2.0

µA

2.5

TC IOFF

Offset Current Drift

See(8)

nA/°C

RIN

Input Resistance

Pin 3 & 6

750

Ω

CIN

Input Capacitance

Pin 3 & 6

IVG

VG Bias Current

Pin 2, VG = 1.4V

(7)

µA

TC IVG

VG Bias Drift

Pin 2(8)

nA/°C

R VG

VG Input Resistance

Pin 2

Ω

C VG

VG Input Capacitance

Pin 2

1.3

VOUT

Output Voltage Range

RL = 100Ω

±3.00

±3.20

±2.97

RL Open

±3.95

±4.05

±3.90

ROUT

Output Impedance

0.1

Ω

IOUT

Output Current

VOUT ±4V from Rails

±75

±90

±70

VO OFFSET

Output Offset Voltage

−1V < VG < 1V

±80

±350

±380

+PSRR

+Power Supply Rejection Ratio

Input Referred, 1V change,

−80

−58

(See(9))

VG = 1.4V

−56

−PSRR

−Power Supply Rejection Ratio

Input Referred, 1V change,

−67

−57

(See(9))

VG = 1.4V

−51

CMRR

Common Mode Rejection Ratio

Input Referred, VG = 1V

−67

(See(10))

−1.8V < VCM < 1.8V

(6)

CMRR definition: [|

ΔVOUT/ΔVCM|/AV] with 0.1V differential input voltage. ΔVOUT is the change in output voltage with offset shift

subtracted out.

(7)

Positive current correspondes to current flowing in the device.

(8)

Drift determined by dividing the change in parameter distribution at temperature extremes by the total temperature change.

(9)

+PSRR definition: [|

ΔVOUT/ΔV

+| /A

V], -PSRR definition: [|ΔVOUT/ΔV

−| /A

V] with 0.1V differential input voltage. ΔVOUT is the change in

output voltage with offset shift subtracted out.

(10) CMRR definition: [|

ΔVOUT/ΔVCM|/AV] with 0.1V differential input voltage. ΔVOUT is the change in output voltage with offset shift

subtracted out.

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