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TMS320C6472ECTZ Datasheet(PDF) 187 Page - Texas Instruments |
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TMS320C6472ECTZ Datasheet(HTML) 187 Page - Texas Instruments |
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187 / 269 page  HCS HAS HR/W HHWIL HSTROBE(A) HD[15:0] HRDY(B) 2 3 1 37 9 10 14 2 38 12 11 12 11 12 11 13 7 6 1 3 13 37 9 10 36 HCNTL[1:0] 12 11 12 11 12 11 TMS320C6472 www.ti.com SPRS612G – JUNE 2009 – REVISED JULY 2011 A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS. B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on the HPI peripheral, see the TMS320C6472/TMS320TCI6486 DSP Host Port Interface (HPI) User 's Guide (literature number SPRUEG1). Figure 7-42. HPI16 Read Timing (HAS Used) Copyright © 2009–2011, Texas Instruments Incorporated C64x+ Peripheral Information and Electrical Specifications 187 Submit Documentation Feedback Product Folder Link(s) :TMS320C6472 |
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