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TMS570LS1114 Datasheet(PDF) 118 Page - Texas Instruments |
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TMS570LS1114 Datasheet(HTML) 118 Page - Texas Instruments |
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118 / 169 page  EQEP1A VIM EQEP1INTn EQEP1 Module IO Mux EQEP1ENCLK EQEP1IO EQEP1I VBus32 VCLK4 SYS_nRST EQEP1B EQEP1IOE EQEP1SO EQEP1S EQEP1SOE EQEP1ERR EPWM1/../7 EQEP2A VIM EQEP2INTn EQEP2 Module EQEP2ENCLK EQEP2IO EQEP2I VBus32 VCLK4 SYS_nRST EQEP2B EQEP2IOE EQEP2SO EQEP2S EQEP2SOE EQEP2ERR Connection Selection Mux TMS570LS1114 SPNS188B – OCTOBER 2012 – REVISED FEBRUARY 2015 www.ti.com 7.3 Enhanced Quadrature Encoder (eQEP) Figure 7-4 shows the eQEP module interconnections on the device. Figure 7-4. eQEP Module Interconnections 7.3.1 Clock Enable Control for eQEPx Modules Device-level control registers are implemented to generate the EQEPxENCLK signals. When SYS_nRST is active low, the clock enables are ignored and the eQEPx logic is clocked so that it can reset to a proper state. When SYS_nRST goes in-active high, the state of clock enable is respected. Table 7-11. eQEPx Clock Enable Control ePWM Module Instance Control Register to Enable Clock Default Value eQEP1 PINMMR40[16] 1 eQEP2 PINMMR40[24] 1 The default value of the control registers to enable the clocks to the eQEPx modules is 1. This means that the VCLK4 clock connections to the eQEPx modules are enabled by default. The application can choose to gate off the VCLK4 clock to any eQEPx module individually by clearing the respective control register bit. 7.3.2 Using eQEPx Phase Error to Trip ePWMx Outputs The eQEP module sets the EQEPERR signal output whenever a phase error is detected in its inputs EQEPxA and EQEPxB. This error signal from both the eQEP modules is input to the connection selection multiplexor. This multiplexor is defined in Table 7-3. As shown in Figure 7-1, the output of this selection multiplexor is inverted and connected to the TZ4n trip-zone input of all EPWMx modules. This connection allows the application to define the response of each ePWMx module on a phase error indicated by the eQEP modules. 7.3.3 Input Connections to eQEPx Modules The input connections to each of the eQEP modules can be selected between a double-VCLK4- synchronized input or a double-VCLK4-synchronized and filtered input, as shown in Table 7-12. 118 Peripheral Information and Electrical Specifications Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS570LS1114 |
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