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Elmos Semiconductor AG

Data Sheet

QM-No.: 25DS0046E.03

PRODUCTION DATA - JAN 15, 2015

Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.

KNX/ EIB TRANSCEIVER

E981.03

1) Access via UART service and SPI possible. For write access read the remarks of every bit carefully. In case of hard reset the

register is reset to the hard reset value.

PS_CTRL

MSB

LSB

content

VIO_SW

-

-

hard reset value

0

0

1

1

0

0

1

1

soft reset value

0

-

1

1

-

-

1

1

external access

R

R

R

bit description

VCC_ON :

“01”,”10”,”11”: V

The bits do not reflect the state of the V

The actual state is reflected by PS_STAT register.

V20_ON :

"00": V

1)

“01”,”10”,”11”: V

The bits do not reflect the state of the V

The actual state is reflected by PS_STAT register.

VIO_SW:

When VCC = 5 V and VIO = 3.3 V: write “1” to VIO_SW bit to reduce power consumption of

E981.03. In all other cases this bit has no effect.

back to Table 8 Register Table

Table 26. Power supply control register

1) The bits VCC_ON and V20_ON are doubled for safety reasons. VCC and V20 supplies are switched off only if both ON bits have

value "0". Otherwise the supply is switched on and the ON bits are set to value "1" by the E981.03 itself.

2) Access via UART service and SPI possible. In case of hard or soft reset the register is reset to the hard reset value or soft reset

value respectively.

Register Name

Address

Description

PS_CTRL

0x20E

power supply control register

PS_STAT

0x3BF

power supply status register

Table 25. Power supply registers

ALARM_STAT

MSB

LSB

soft reset value

-

-

-

-

-

-

-

-

external access

bit description

PEND :

"1": an alarm transmission is either pending, under transmission or sent

(e.g. in case of alarm pin activation during transmission of a "normal" telegram)

"0": no alarm is pending or sent

Writing to the register using UART U_WriteReg service clears the PEND bit independent of

the value that is written to that bit.

Writing using SPI shall not change the value of the PEND bit which is not controlled by the

E981.03 but is in the responsibility of the host controller.

BUF :

"1": the alarm buffer was written completely

"0": the alarm buffer was not written completely yet

The bit is set by the E981.03 after successful upload using host UART interface services.

It may be written by the host directly to activate alarm functionality without using upload

procedure via host UART interface or after uploading a alarm telegramm by SPI. The alarm

telegram buffer is not checked for correctness in this case.

SENT :

"1": an alarm telegram was sent

"0": no alarm telegram was sent

The bit is set after sending of an alarm telegram.

It can be reset by the host processor by writing a "0". The host should never write an “1” to

the SENT bit. If the bit SENT is set no alarm telegram is transmitted regardless of the alarm

condition. An ongoing alarm telegram transmission on EIB bus (states AlarmTelegramWait

and AlarmTelegramTransmit) is not interrupted by writing a “0” to the SENT bit.

A reading by UART Interface delete this bit. A SPI read do not delete this and the User have

to do this.