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Elmos Semiconductor AG

Data Sheet

QM-No.: 25DS0046E.03

PRODUCTION DATA - JAN 15, 2015

Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.

KNX/ EIB TRANSCEIVER

E981.03

CURRENT_SLOPE

MSB

LSB

content

-

-

-

-

-

-

SL1

SL0

hard reset value

0

0

0

0

0

0

0

1

soft reset value

-

-

-

-

-

-

0

1

access

R

R

R

R

R

R

bit description

see following table for SL values.

back to Table 8 Register Table

Table 32. Set up the maximum bus current slope

1) Access via UART service and SPI possible. For write access read the remarks of every bit carefully. In case of hard or soft reset the

register is reset to the hard reset value or soft reset value respectively.

CLK_CTRL

MSB

LSB

content

-

-

-

-

-

EXT_Q

-

ENQ

hard reset value

0

0

0

0

0

0

0

1

soft reset value

-

-

-

-

-

0

-

1

access

R

R

R

R

R

R

bit description

EXT_Q :

„1“: XTAL is used as clock input from external clock source, EXTAL is left open and internal

capacitors are disconnected

„0“: a quartz is connected to XTAL and EXTAL

ENQ :

„1“: crystal or clock enabled

„0“: crystal or clock disabled and XTAL grounded useful e.g. for analog mode

CLK_FAC0

MSB

LSB

content

F7

F6

F5

F4

F3

F2

F1

F0

hard reset value

0

0

1

1

0

0

0

0

soft reset value

0

0

1

1

0

0

0

0

access

back to Table 8 Register Table

back to Table 8 Register Table

Table 35. Host clock control register

Table 36. Clock divider register (low part)

Register Name

Address

Description

CLK_CTRL

0x209

host clock control register

CLK_FAC0

0x20A

lower 8 bit of the clock divider register

CLK_FAC1

0x20B

upper 8 bit of the clock divider register

SL1

SL0

Slope limitation mode, mA/ms

0

0

0.25

0

1

0.5 (default)

1

0

1.25

1

1

2.5

Table 34. Clock registersSet up the maximum bus current slope

Table 33. Bus current slope selection values

1) For write access read the remarks of every bit carefully. In case of soft and hard reset the state machine writes mentioned values.

1) Access via UART service and SPI possible. For write access read the remarks of every bit carefully. In case of hard or soft reset the

register is reset to the hard reset value or soft reset value respectively.