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E98103A38B Datasheet(PDF) 41 Page - ELMOS Semiconductor AG

Part # E98103A38B
Description  Autonomous MAC and individual physical address
PDF  51 Pages
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Manufacturer  ELMOS [ELMOS Semiconductor AG]
Direct Link  http://www.elmos.de
Logo ELMOS - ELMOS Semiconductor AG

E98103A38B Datasheet(HTML) 41 Page - ELMOS Semiconductor AG

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Elmos Semiconductor AG
Data Sheet
QM-No.: 25DS0046E.03
PRODUCTION DATA - JAN 15, 2015
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
KNX/ EIB TRANSCEIVER
E981.03
Register Name
Address
Description
KNX_ADR_STAT
0x216
status of the address
KNX_ADR_HIGH
0x108
KNX subnet adress high byte
KNX_ADR_LOW
0x109
KNX subnet adress low byte
Register Name
Address
Description
MAX_RST_CNT
0x217
number of retries in case of not acknowledge and busy
KNX_TR_BUF_STAT 0x215
status of the transmit telegram buffer
KNX_TX_LEN1
0x218
length of the frame in the transmit buffer (bit 8) 1)
KNX_TX_LEN0
0x219
length of the frame in the transmit buffer (bits 7 ... 0) 1)
KNX_TR_BUF
0x000 …
0x107
264 Byte transmit buffer
KNX_RC_BUF
0x1C0…
0x1FF
64 Byte receiving frame buffer
Table 38. KNX address register
Table 40. Telegram transmission register
KNX_ADR_STAT
MSB
LSB
content
-
-
-
-
-
-
-
VALID
hard reset value
0
0
0
0
0
0
0
0
soft reset value
-
-
-
-
-
-
-
0
access
R
R
R
R
R
R
R
R/W 1)
bit description
VALID :
"1": the stored address is valid
"0": the stored address is invalid
the bit is set by the host by writing to the register or by using U_SetAddress service re-
quest
it is reset. If the Address is configured by SPI the User have to set this bit too.
- by the host by writing to the register and
- during soft reset
Table 39. Status of the KNX address
back to Table 8 Register Table
1) The length of the frame gives the number of bytes stored in the frame transmit buffer including all frame overhead.
1) Access via UART service and SPI possible. In case of hard or soft reset the register is reset to the hard reset value or soft reset
value respectively.
1) Access via UART service and SPI possible. In case of hard or soft reset the register is reset to the hard reset value or soft reset
value respectively.
MAX_RST_CNT
MSB
LSB
content
-
BUSY2
BUSY1
BUSY0
-
NACK2
NACK1
NACK0
hard reset value
0
0
1
1
0
0
1
1
soft reset value
-
0
1
1
-
0
1
1
access
R
R/W 1)
R/W 1)
R/W 1)
R
R/W 1)
R/W 1)
R/W 1)
bit description
ACK : number of retries in case of not acknowledge (either NACK on no ack frame)
BUSY : number of retries in case of busy (BUSY or simultaneously BUSY and NACK)
Table 41. MAX_RST_CNT
back to Table 8 Register Table



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