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MRF24XA-I/MQ Datasheet(PDF) 27 Page - Microchip Technology |
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MRF24XA-I/MQ Datasheet(HTML) 27 Page - Microchip Technology |
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27 / 258 page ![]() 2015 Microchip Technology Inc. Preliminary DS70005023C-page 27 MRF24XA REGISTER 2-10: PIE4 (PERIPHERAL INTERRUPT ENABLE 4) ADDRESS: 0x0B R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-0 R/W-0 R/W-0 TXSFDIE RXSFDIE ERRORIE WARNIE EDCCAIE GPIO2IE GPIO1IE GPIO0IE bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown r = Reserved bit 7 TXSFDIE: Transmit SFD Sent Interrupt Enable bit This bit masks the TXSFDIF interrupt bit. bit 6 RXSFDIE: Receive SFD Detected Interrupt Enable bit This bit masks the RXSFDIF Interrupt Enable. bit 5 ERRORIE: General Error Interrupt Enable bit This bit masks the ERRORIF interrupt bit. bit 4 WARNIE: Warning Interrupt Enable bit This bit masks the WARNIF interrupt bit. bit 3 EDCCAIE: Energy Detect/CCA Done Interrupt Enable bit This bit masks the EDCCAIF interrupt bit. bit 2 GPIO2IE: GPIO2 Interrupt Enable bit This bit masks the GPIO2IF interrupt bit. bit 1 GPIO1IE: GPIO1 Interrupt Enable bit This bit masks the GPIO1IF interrupt bit. bit 0 GPIO0IE: GPIO0 Interrupt Enable bit This bit masks the GPIO0IF interrupt bit. |
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