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AT91SAM7A1-AI Datasheet(PDF) 3 Page - ATMEL Corporation |
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AT91SAM7A1-AI Datasheet(HTML) 3 Page - ATMEL Corporation |
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3 / 14 page  3 PRELIMINARY AT91SAM7A1 Summary 6048AS–ATARM–07/04 Block Diagram Figure 1. AT91SAM7A1 Block Diagram VDDIO GND NRESET PWM0/MPIO ADD[19:1] ADD21/CS6 NWR0/NWE NWR1 1/NUB NCS[3:0] D[15:0] CAPT0/MPIO PWM1/MPIO PWM2/MPIO PWM3/MPIO PLLRC CAPT1/MPIO ADD20/CS7 ADD0/NLB SPI USART0 TC0 EBI JTAG Select MCKI MCKO RTCKI RTCKO PIO PIO ST0 USART1 PIO TC1 PIO TC2 PIO PWM CH0 CH1 CH2 CH3 PIO CORECLK 5V-compliant Analog Supply 3V3 Supply 5V-compliant CH0 CH1 ST1 CH0 CH1 MC Osc 2 PDC Channels 2 PDC Channels 2 PDC Channels Advanced Memory Controller Embedded ICE ARM7TDMI Core I/O Power Supply Core Power Supply Generic Interrupt Controller Reset 11 Channel PDC Controller Arbiter ASB Controller SFM AMBATM Bridge 4 KB Internal RAM Watch Dog Simple Timers T0TIOA2/MPIO T0TIOB2/MPIO T0TCLK2/MPIO T0TIOA1/MPIO T0TIOB1/MPIO T0TCLK1/MPIO T0TIOA0/MPIO T0TIOB0/MPIO T0TCLK0/MPIO RXD1/MPIO TXD1/MPIO SCK1/MPIO RXD0/MPIO TXD0/MPIO SCK0/MPIO SPCK/MPIO MISO/MPIO MOSI/MPIO NPCS0/MPIO NPCS1/MPIO NPCS2/MPIO NPCS3/MPIO Timer GPT0 Analog Power Suppy 1 PDC Channel ADC0 8-channel 10-bit ADC CAN0 Full Speed 16 Buffers AT91SAM7A1 USART2 PIO 2 PDC Channels RXD2/MPIO TXD2/MPIO SCK2/MPIO WT UPIO PIO CH0 PIO 1 PDC Channel Capture 1 CH0 PIO 1 PDC Channel Capture 0 RT Osc PLL 64 Clock Manager 4 - 8 MHz PLLON PLL x MCK 32.768 MHz LFCLK NOE/NRD |
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