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VN7004CLH Datasheet(PDF) 35 Page - STMicroelectronics |
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VN7004CLH Datasheet(HTML) 35 Page - STMicroelectronics |
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35 / 36 page ![]() VN7004CLH Revision history DocID027770 Rev 5 35/36 7 Revision history Table 19: Document revision history Date Revision Changes 18-Sep-2015 1 Initial release. 12-Nov-2015 2 Table 6: "Power section": ISTBY, IL(off): updated values Table 10: "CurrentSense": dKx/Kx: updated values 29-Apr-2016 3 Updated Figure 2: "Configuration diagram (top view)" and Figure 8: "CurrentSense and diagnostic – block diagram" Table 10: "CurrentSense": ISENSE0: updated value K0, K2, K3: updated test conditions and values K1, dKx/Kx: updated test conditions 13-Jul-2016 4 Section "Features": Current limitation (typ): updated value Table 4: "Absolute maximum ratings": EMAX: updated TDEMAG parameter and value Table 5: "Thermal data": Updated all Typ values and Rthj-case term Rthj-case: removed JEDEC reference Table 7: "Switching": Updated min, typ and max values for all parameters Table 9: "Protections": ILIMH, ILIML: updated typ and max values ΔTJ_SD: removed Tj test condition Table 10: "CurrentSense": VSENSE_SAT, ISENSE_SAT, IOUT_SAT: updated test conditions tDSENSE2H: updated max value Section 3.3: "Main electrical characteristics": Added Figure 4: "IOUT/ISENSE versus IOUT" and Added Section 3.4: "Electrical characteristics curves" Section 5.4.2: "Short to VCC and OFF-state open-load detection": Figure 34: "Maximum turn off current versus inductance" Section 7.1: "Octapak thermal data": Updated Figure 35: "Octapak on two-layers PCB (2s0p to JEDEC JESD 51-5)", Figure 36: "Octapak on four-layers PCB (2s2p to JEDEC JESD 51-7)", Figure 37: "Rthj-amb vs PCB copper area in open box free air conditions", Figure 38: "Octapak thermal impedance junction ambient single pulse", Figure 39: "Thermal fitting model for Octapak", and Table 16: "Thermal parameters" Minor text corrections throughout the document 02-Nov-2016 5 Updated Applications section |
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