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DA9063 Datasheet(PDF) 21 Page - Dialog Semiconductor

Part # DA9063
Description  System PMIC for Mobile Application Processors
PDF  219 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

DA9063 Datasheet(HTML) 21 Page - Dialog Semiconductor

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DA9063
System PMIC for Mobile Application Processors
Datasheet
DA9063_2v1
23-Mar-2017
CFR0011-120-00
21 of 219
© 2017 Dialog Semiconductor
Operating Mode
Conditions (Note 1)
Backup
Device
Battery
Unit
LOW-POWER mode
VSYS > VDD_FAULT_LOWER,
supplies off (except LDOCORE), all
blocks in POWERDOWN mode,
RTC on, pulsed mode with limited
parametric compliance
18
µA
POWERDOWN mode
(Hibernate)
VSYS > VDD_FAULT_LOWER,
supplies off (except LDOCORE), all
blocks in POWERDOWN mode,
RTC on
40
µA
POWERDOWN mode (Standby)
BUCKCORE, LDOCORE, LDO2, 4,
5 enabled, RTC and GPIO unit on
65
Note 4
µA
ACTIVE mode
All supplies, GPIO, RTC and
GPADC on
320
µA
Note 1
nONKEY/CHG_WAKE/VDDREF detection circuit is enabled in all modes.
Note 2
See VBBAT current in RTC or DELIVERY modes [1]
Note 3
0 µA if no main battery available.
Note 4
Regulators are running in sleep mode.
5.4
Digital I/O Characteristics
Table 9: Digital I/O Electrical Characteristics, TJ = -40 ºC to +125 ºC
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
GPI0 to GPI15, nOFF,
nSHUTDOWN
SYS_EN, PWR_EN,
PWR1_EN
Input High Voltage
VIH
VDDCORE mode
1.0
VSYS
V
VDD_IO2 mode
0.7*VDD_IO2
VSYS
GPI0 to GPI15, nOFF,
nSHUTDOWN
SYS_EN, PWR_EN,
PWR1_EN
Input Low Voltage
VIL
VDDCORE mode
-0.3
0.4
V
VDD_IO2 mode
-0.3
0.3*VDD_IO2
nONKEY, CHG_WAKE
Input High Voltage
VIH
RTC mode
1.0
VSYS
V
nONKEY, CHG_WAKE
Input Low Voltage
VIL
RTC mode
-0.3
0.4
V
CLK, DATA, SK, SI
(2-WIRE mode)
Input High Voltage
VIH
VDDCORE mode
1.0
V
VDD_IO2 mode
0.7*VDD_IO2
CLK, DATA, SK, SI
(2-WIRE mode)
Input Low Voltage
VIL
VDDCORE mode
0.4
V
VDD_IO2 mode
0.3*VDD_IO2
SK, nCS, SI
(4-WIRE mode)
Input High Voltage
VIH
0.7*VDD_IOx
V
SK, nCS, SI
(4-WIRE mode)
Input Low Voltage
VIL
0.3*VDD_IOx
V



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