STGIPN3H60-H

Smart shutdown function

DocID024132 Rev 4

15/23

Figure 6: Smart shutdown timing waveforms

Please refer to Table 13: "Sense comparator characteristics (VCC = 15 V unless otherwise

specified)" for internal propagation delay time details.

SD/OD

F ROM /T O

CONT ROLLER

S M A RT

SD

LOGIC

SHUT DOW N CIRCUIT

An approximation of the disable time is given by:

where:

H IN /LIN

H VG/LVG

open drain gate

(internal)

comp Vref

C P+

PROTECTION

the driver outputs are set in SD state im m ediately after the com parator

triggering even if the SD signal has not yet reach the low er input threshold

disable tim e

SD /OD

AM12947v1