SPC56EL70L3 datasheet(79/128 Pages) STMICROELECTRONICS

79 / 128 page

DocID023953 Rev 5

79/128

SPC56EL70L3, SPC56EL70L5,PC564L70L3, SPC564L70L5

Electrical characteristics

127

3.5

Thermal characteristics

3.5.1

General notes for specifications at maximum junction temperature

An estimation of the chip junction temperature, TJ, can be obtained from Equation 1:

Table 11. Thermal characteristics for LQFP100 package(1)

Symbol

Parameter

Conditions

Value

Unit

RJA

D Thermal resistance, junction-to-ambient natural

convection(2)

Single layer board – 1s

°C/W

Four layer board – 2s2p

RJMA D Thermal resistance, junction-to-ambient forced

convection at 200 ft/min

Single layer board – 1s

°C/W

Four layer board – 2s2p

RJB

D Thermal resistance junction-to-board(3)

—19

°C/W

RJC

D Thermal resistance junction-to-case(4)

—8

°C/W

JT

D Junction-to-package-top natural convection(5)

—2

°C/W

1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

2. Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets

JEDEC specification for this package.

3. Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification

for the specified package.

4. Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is

used for the case temperature. Reported value includes the thermal resistance of the interface layer.

5. Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written

as Psi-JT.

Table 12. Thermal characteristics for LQFP144 package(1)

Symbol

Parameter

Conditions

Value

Unit

RJA

Thermal resistance, junction-to-ambient natural

convection(2)

Single layer board – 1s

°C/W

Four layer board – 2s2p

RJMA D

Thermal resistance, junction-to-ambient forced

convection at 200 ft/min

Single layer board – 1s

°C/W

Four layer board – 2s2p

RJB

Thermal resistance junction-to-board(3)

—24

°C/W

RJC

Thermal resistance junction-to-case(4)

—8

°C/W

JT

Junction-to-package-top natural convection(5)

—2

°C/W

1. Thermal characteristics are targets based on simulation that are subject to change per device characterization.

2. Junction-to-Ambient thermal resistance determined per JEDEC JESD51-3 and JESD51-6. Thermal test board meets

JEDEC specification for this package.

3. Junction-to-Board thermal resistance determined per JEDEC JESD51-8. Thermal test board meets JEDEC specification

for the specified package.

4. Junction-to-Case at the top of the package determined using MIL-STD 883 Method 1012.1. The cold plate temperature is

used for the case temperature. Reported value includes the thermal resistance of the interface layer.

5. Thermal characterization parameter indicating the temperature difference between the package top and the junction

temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written

as Psi-JT.

SPC56EL70L3 Datasheet(PDF) 79 Page - STMicroelectronics

SPC56EL70L3 Datasheet(HTML) 79 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL