SPC56EL70L3 datasheet(89/128 Pages) STMICROELECTRONICS

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SPC56EL70L3, SPC56EL70L5,PC564L70L3, SPC564L70L5

Electrical characteristics

127

IDD_LV_STOP

T Operating current in

VDD STOP mode

TJ = 25 C

VDD_LV_COR = 1.32 V

——

TTJ = 55 C

VDD_LV_COR = 1.32 V

——

PTJ = 150 C

VDD_LV_COR = 1.32 V

——

115

IDD_LV_HALT

T Operating current in

VDD HALT mode

TJ = 25 C

VDD_LV_COR = 1.32 V

——

TTJ = 55 C

VDD_LV_COR = 1.32 V

——

PTJ = 150 C

VDD_LV_COR = 1.32 V

—

125

IDD_HV_ADC(3),(4) T Operating current

TJ = 150 C

120 MHz

ADC operating at 60 MHz

VDD_HV_ADC = 3.6 V

——

IDD_HV_AREF(4)

T Operating current

TJ = 150 C

120 MHz

ADC operating at 60 MHz

VDD_HV_REF = 3.6 V

——

TJ = 150 C

120 MHz

ADC operating at 60 MHz

VDD_HV_REF = 5.5 V

——

IDD_HV_OSC

(oscillator

bypass mode)

T Operating current

TJ = 150 C

3.3 V supplies

120 MHz

—

900

µA

IDD_HV_OSC

(crystal oscillator

mode)

D Operating current

TJ = 150 C

3.3 V supplies

120 MHz

——

3.5

IDD_HV_FLASH(5)

T Operating current

TJ = 150 C

3.3 V supplies

120 MHz

——

IDD_HV_PMU

T Operating current

TJ = 150 C

3.3 V supplies

120 MHz

——

1. Devices configured for DPM mode, single core only with Core 0 executing typical code at 120 MHz from SRAM and Core 1

in reset. If core execution mode not specified, the device is configured for LSM mode with both cores executing typical code

at 120 MHz from SRAM.

2. Enabled Modules in 'Typical mode': FlexPWM0, ETimer0/1/2, CTU, SWG, DMA, FlexCAN0/1, LINFlex, ADC1, DSPI0/1,

PIT, CRC, PLL0/1, I/O supply current excluded

3. Internal structures hold the input voltage less than VDDA + 1.0 V on all pads powered by VDDA supplies, if the maximum

injection current specification is met and VDDA is within the operating voltage specifications.

4. This value is the total current for both ADCs.

5. VFLASH is only available in the calibration package.

Table 20. Current consumption characteristics (continued)

Symbol

Parameter

Conditions(1)

Min

Typ

Max

Unit

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