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ST72344S2 Datasheet(PDF) 169 Page - STMicroelectronics |
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ST72344S2 Datasheet(HTML) 169 Page - STMicroelectronics |
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169 / 247 page ![]() ST72344xx, ST2345xx On-chip peripherals Doc ID 12321 Rev 6 169/247 SDA/SCL line control ● When the I2C3S interface is enabled, the SDA and SCL ports must be configured as floating inputs. In this case, the value of the external pull-up resistor used depends on the application. ● When the I2C3S interface is disabled, the SDA and SCL ports revert to being standard I/O port pins. Figure 72. I2C bus protocol 11.7.4 Functional description The three slave addresses 1, 2 and 3 can be used as general purpose I2C slaves. They also support all features of standard I2C EEPROMs like the ST M24Cxx family and are able to fully emulate them. Slaves 1 and 2 are mapped on the same interrupt vector. Slave 3 has a separate interrupt vector with higher priority. The three slave addresses are defined by writing the 7 MSBs of the address in the I2C3SSAR1, I2C3SSAR2 and I2C3SSAR3 registers. The slaves are enabled by setting the enable bits in the same registers. Each slave has its own RAM buffer at a fixed location in the ST7 RAM area. ● Slaves 1 and 2 have 256-byte buffers which can be individually protected from I2C master write accesses. ● Slave 3 has a 128-byte RAM buffer without write protection feature. All three slaves have individual read flags (RF) and write flags (WF) with maskable interrupts. These flags are set when the I2C master has completed a read or write operation. Paged operation To allow emulation of Standard I2C EEPROM devices, pages can be defined in the RAM buffer. The pages are configured using the PL[1:0] bits in the I2C3SCR1 register. 8/16-Byte page length has to be selected depending on the EEPROM device to emulate. The Full Page option is to be used when no paging of the RAM buffer is required. The configuration is common to the 3 slave addresses. The Full Page configuration corresponds to 256 bytes for address 1 and 2 and to 128 bytes for address 3. Paging affects the handling of rollover when write operations are performed. In case the bottom of the page is reached, the write continues from the first address of the same page. Page length does not affect read operations: rollover is done on the whole RAM buffer whatever the configured page length. SCL SDA 12 8 9 MSB ACK Stop Start condition condition |
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